1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
|
/* SPDX-License-Identifier: GPL-2.0 */
/*
* camss-csid.h
*
* Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module
*
* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
* Copyright (C) 2015-2018 Linaro Ltd.
*/
#ifndef QC_MSM_CAMSS_CSID_H
#define QC_MSM_CAMSS_CSID_H
#include <linux/clk.h>
#include <media/media-entity.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-mediabus.h>
#include <media/v4l2-subdev.h>
#define MSM_CSID_PAD_SINK 0
#define MSM_CSID_PAD_SRC 1
#define MSM_CSID_PADS_NUM 2
#define DATA_TYPE_EMBEDDED_DATA_8BIT 0x12
#define DATA_TYPE_YUV420_8BIT 0x18
#define DATA_TYPE_YUV420_10BIT 0x19
#define DATA_TYPE_YUV420_8BIT_LEGACY 0x1a
#define DATA_TYPE_YUV420_8BIT_SHIFTED 0x1c /* Chroma Shifted Pixel Sampling */
#define DATA_TYPE_YUV420_10BIT_SHIFTED 0x1d /* Chroma Shifted Pixel Sampling */
#define DATA_TYPE_YUV422_8BIT 0x1e
#define DATA_TYPE_YUV422_10BIT 0x1f
#define DATA_TYPE_RGB444 0x20
#define DATA_TYPE_RGB555 0x21
#define DATA_TYPE_RGB565 0x22
#define DATA_TYPE_RGB666 0x23
#define DATA_TYPE_RGB888 0x24
#define DATA_TYPE_RAW_24BIT 0x27
#define DATA_TYPE_RAW_6BIT 0x28
#define DATA_TYPE_RAW_7BIT 0x29
#define DATA_TYPE_RAW_8BIT 0x2a
#define DATA_TYPE_RAW_10BIT 0x2b
#define DATA_TYPE_RAW_12BIT 0x2c
#define DATA_TYPE_RAW_14BIT 0x2d
#define DATA_TYPE_RAW_16BIT 0x2e
#define DATA_TYPE_RAW_20BIT 0x2f
enum csid_payload_mode {
CSID_PAYLOAD_MODE_INCREMENTING = 0,
CSID_PAYLOAD_MODE_ALTERNATING_55_AA = 1,
CSID_PAYLOAD_MODE_ALL_ZEROES = 2,
CSID_PAYLOAD_MODE_ALL_ONES = 3,
CSID_PAYLOAD_MODE_RANDOM = 4,
CSID_PAYLOAD_MODE_USER_SPECIFIED = 5,
};
struct csid_testgen_config {
u8 enabled;
enum csid_payload_mode payload_mode;
};
struct csid_phy_config {
u8 csiphy_id;
u8 lane_cnt;
u32 lane_assign;
};
struct csid_device {
struct camss *camss;
u8 id;
struct v4l2_subdev subdev;
struct media_pad pads[MSM_CSID_PADS_NUM];
void __iomem *base;
u32 irq;
char irq_name[30];
struct camss_clock *clock;
int nclocks;
struct regulator *vdda;
struct completion reset_complete;
struct csid_testgen_config testgen;
struct csid_phy_config phy;
struct v4l2_mbus_framefmt fmt[MSM_CSID_PADS_NUM];
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *testgen_mode;
const struct csid_format *formats;
unsigned int nformats;
};
struct resources;
int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid,
const struct resources *res, u8 id);
int msm_csid_register_entity(struct csid_device *csid,
struct v4l2_device *v4l2_dev);
void msm_csid_unregister_entity(struct csid_device *csid);
void msm_csid_get_csid_id(struct media_entity *entity, u8 *id);
#endif /* QC_MSM_CAMSS_CSID_H */
|