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path: root/drivers/net/ethernet/marvell/mvgmac.h
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#ifndef MVGMAC_H
#define MVGMAC_H

#include <linux/phy.h>

struct phylink_link_state;

/* The two bytes Marvell header. Either contains a special value used by
 * Marvell switches when a specific hardware mode is enabled (not supported
 * by this driver) or is filled automatically by zeroes on the RX side.
 * Those two bytes being at the front of the Ethernet header, they allow
 * to have the IP header aligned on a 4 bytes boundary automatically: the
 * hardware skips those two bytes on its own.
 */
#define MARVELL_HEADER_SIZE 2

struct mvgmac {
	void __iomem *base;
};

void mvgmac_set_max_rx_size(struct mvgmac *gmac, size_t max_rx_size);
void mvgmac_enable(struct mvgmac *gmac);
void mvgmac_disable(struct mvgmac *gmac);
void mvgmac_link_unforce(struct mvgmac *gmac);
void mvgmac_link_force_down(struct mvgmac *gmac);
void mvgmac_link_down(struct mvgmac *gmac, int mode);
void mvgmac_link_up(struct mvgmac *gmac, int mode, int speed, int duplex,
		    bool tx_pause, bool rx_pause);
bool mvgmac_link_is_up(struct mvgmac *gmac);
void mvgmac_pcs_get_state(struct mvgmac *gmac,
			  struct phylink_link_state *state);
void mvgmac_pcs_an_restart(struct mvgmac *gmac);
int mvgmac_pcs_config(struct mvgmac *gmac, unsigned int mode,
		      phy_interface_t interface,
		      const unsigned long *advertising,
		      bool permit_pause_to_mac);
void mvgmac_config_mac(struct mvgmac *gmac, unsigned int mode,
		       const struct phylink_link_state *state);

int mvgmac_set_lpi_ts(struct mvgmac *gmac, unsigned int ts);
void mvgmac_set_eee(struct mvgmac *gmac, bool enable);

#endif