summaryrefslogtreecommitdiff
path: root/sound/soc/codecs/rt1308-sdw.c
blob: 63d4abf964d45cdc36938adb97b67ba8b98a4cdd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
// SPDX-License-Identifier: GPL-2.0
//
// rt1308-sdw.c -- rt1308 ALSA SoC audio driver
//
// Copyright(c) 2019 Realtek Semiconductor Corp.
//
//
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/pm_runtime.h>
#include <linux/mod_devicetable.h>
#include <linux/soundwire/sdw.h>
#include <linux/soundwire/sdw_type.h>
#include <linux/soundwire/sdw_registers.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/sdw.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>

#include "rt1308.h"
#include "rt1308-sdw.h"

static bool rt1308_readable_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x00e0:
	case 0x00f0:
	case 0x2f01 ... 0x2f07:
	case 0x3000 ... 0x3001:
	case 0x3004 ... 0x3005:
	case 0x3008:
	case 0x300a:
	case 0xc000 ... 0xcff3:
		return true;
	default:
		return false;
	}
}

static bool rt1308_volatile_register(struct device *dev, unsigned int reg)
{
	switch (reg) {
	case 0x2f01 ... 0x2f07:
	case 0x3000 ... 0x3001:
	case 0x3004 ... 0x3005:
	case 0x3008:
	case 0x300a:
	case 0xc000:
	case 0xc710:
	case 0xcf01:
	case 0xc860 ... 0xc863:
	case 0xc870 ... 0xc873:
		return true;
	default:
		return false;
	}
}

static const struct regmap_config rt1308_sdw_regmap = {
	.reg_bits = 32,
	.val_bits = 8,
	.readable_reg = rt1308_readable_register,
	.volatile_reg = rt1308_volatile_register,
	.max_register = 0xcfff,
	.reg_defaults = rt1308_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(rt1308_reg_defaults),
	.cache_type = REGCACHE_MAPLE,
	.use_single_read = true,
	.use_single_write = true,
};

/* Bus clock frequency */
#define RT1308_CLK_FREQ_9600000HZ 9600000
#define RT1308_CLK_FREQ_12000000HZ 12000000
#define RT1308_CLK_FREQ_6000000HZ 6000000
#define RT1308_CLK_FREQ_4800000HZ 4800000
#define RT1308_CLK_FREQ_2400000HZ 2400000
#define RT1308_CLK_FREQ_12288000HZ 12288000

static int rt1308_clock_config(struct device *dev)
{
	struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
	unsigned int clk_freq, value;

	clk_freq = (rt1308->params.curr_dr_freq >> 1);

	switch (clk_freq) {
	case RT1308_CLK_FREQ_12000000HZ:
		value = 0x0;
		break;
	case RT1308_CLK_FREQ_6000000HZ:
		value = 0x1;
		break;
	case RT1308_CLK_FREQ_9600000HZ:
		value = 0x2;
		break;
	case RT1308_CLK_FREQ_4800000HZ:
		value = 0x3;
		break;
	case RT1308_CLK_FREQ_2400000HZ:
		value = 0x4;
		break;
	case RT1308_CLK_FREQ_12288000HZ:
		value = 0x5;
		break;
	default:
		return -EINVAL;
	}

	regmap_write(rt1308->regmap, 0xe0, value);
	regmap_write(rt1308->regmap, 0xf0, value);

	dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);

	return 0;
}

static int rt1308_read_prop(struct sdw_slave *slave)
{
	struct sdw_slave_prop *prop = &slave->prop;
	int nval, i;
	u32 bit;
	unsigned long addr;
	struct sdw_dpn_prop *dpn;

	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;

	prop->paging_support = true;

	/* first we need to allocate memory for set bits in port lists */
	prop->source_ports = 0x00; /* BITMAP: 00010100 (not enable yet) */
	prop->sink_ports = 0x2; /* BITMAP:  00000010 */

	/* for sink */
	nval = hweight32(prop->sink_ports);
	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
						sizeof(*prop->sink_dpn_prop),
						GFP_KERNEL);
	if (!prop->sink_dpn_prop)
		return -ENOMEM;

	i = 0;
	dpn = prop->sink_dpn_prop;
	addr = prop->sink_ports;
	for_each_set_bit(bit, &addr, 32) {
		dpn[i].num = bit;
		dpn[i].type = SDW_DPN_FULL;
		dpn[i].simple_ch_prep_sm = true;
		dpn[i].ch_prep_timeout = 10;
		i++;
	}

	/* set the timeout values */
	prop->clk_stop_timeout = 20;

	dev_dbg(&slave->dev, "%s\n", __func__);

	return 0;
}

static void rt1308_apply_calib_params(struct rt1308_sdw_priv *rt1308)
{
	unsigned int efuse_m_btl_l, efuse_m_btl_r, tmp;
	unsigned int efuse_c_btl_l, efuse_c_btl_r;

	/* read efuse to apply calibration parameters */
	regmap_write(rt1308->regmap, 0xc7f0, 0x04);
	regmap_write(rt1308->regmap, 0xc7f1, 0xfe);
	msleep(100);
	regmap_write(rt1308->regmap, 0xc7f0, 0x44);
	msleep(20);
	regmap_write(rt1308->regmap, 0xc240, 0x10);

	regmap_read(rt1308->regmap, 0xc861, &tmp);
	efuse_m_btl_l = tmp;
	regmap_read(rt1308->regmap, 0xc860, &tmp);
	efuse_m_btl_l = efuse_m_btl_l | (tmp << 8);
	regmap_read(rt1308->regmap, 0xc863, &tmp);
	efuse_c_btl_l = tmp;
	regmap_read(rt1308->regmap, 0xc862, &tmp);
	efuse_c_btl_l = efuse_c_btl_l | (tmp << 8);
	regmap_read(rt1308->regmap, 0xc871, &tmp);
	efuse_m_btl_r = tmp;
	regmap_read(rt1308->regmap, 0xc870, &tmp);
	efuse_m_btl_r = efuse_m_btl_r | (tmp << 8);
	regmap_read(rt1308->regmap, 0xc873, &tmp);
	efuse_c_btl_r = tmp;
	regmap_read(rt1308->regmap, 0xc872, &tmp);
	efuse_c_btl_r = efuse_c_btl_r | (tmp << 8);
	dev_dbg(&rt1308->sdw_slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__,
		efuse_m_btl_l, efuse_m_btl_r);
	dev_dbg(&rt1308->sdw_slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__,
		efuse_c_btl_l, efuse_c_btl_r);
}

static void rt1308_apply_bq_params(struct rt1308_sdw_priv *rt1308)
{
	unsigned int i, reg, data;

	for (i = 0; i < rt1308->bq_params_cnt; i += 3) {
		reg = rt1308->bq_params[i] | (rt1308->bq_params[i + 1] << 8);
		data = rt1308->bq_params[i + 2];
		regmap_write(rt1308->regmap, reg, data);
	}
}

static int rt1308_io_init(struct device *dev, struct sdw_slave *slave)
{
	struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
	int ret = 0;
	unsigned int tmp, hibernation_flag;

	if (rt1308->hw_init)
		return 0;

	regcache_cache_only(rt1308->regmap, false);
	if (rt1308->first_hw_init)
		regcache_cache_bypass(rt1308->regmap, true);

	/*
	 * PM runtime status is marked as 'active' only when a Slave reports as Attached
	 */
	if (!rt1308->first_hw_init)
		/* update count of parent 'active' children */
		pm_runtime_set_active(&slave->dev);

	pm_runtime_get_noresume(&slave->dev);

	regmap_read(rt1308->regmap, 0xcf01, &hibernation_flag);
	if ((hibernation_flag != 0x00) && rt1308->first_hw_init)
		goto _preset_ready_;

	/* sw reset */
	regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0);

	regmap_read(rt1308->regmap, 0xc710, &tmp);
	rt1308->hw_ver = tmp;
	dev_dbg(dev, "%s, hw_ver=0x%x\n", __func__, rt1308->hw_ver);

	/* initial settings */
	regmap_write(rt1308->regmap, 0xc103, 0xc0);
	regmap_write(rt1308->regmap, 0xc030, 0x17);
	regmap_write(rt1308->regmap, 0xc031, 0x81);
	regmap_write(rt1308->regmap, 0xc032, 0x26);
	regmap_write(rt1308->regmap, 0xc040, 0x80);
	regmap_write(rt1308->regmap, 0xc041, 0x80);
	regmap_write(rt1308->regmap, 0xc042, 0x06);
	regmap_write(rt1308->regmap, 0xc052, 0x0a);
	regmap_write(rt1308->regmap, 0xc080, 0x0a);
	regmap_write(rt1308->regmap, 0xc060, 0x02);
	regmap_write(rt1308->regmap, 0xc061, 0x75);
	regmap_write(rt1308->regmap, 0xc062, 0x05);
	regmap_write(rt1308->regmap, 0xc171, 0x07);
	regmap_write(rt1308->regmap, 0xc173, 0x0d);
	if (rt1308->hw_ver == RT1308_VER_C) {
		regmap_write(rt1308->regmap, 0xc311, 0x7f);
		regmap_write(rt1308->regmap, 0xc300, 0x09);
	} else {
		regmap_write(rt1308->regmap, 0xc311, 0x4f);
		regmap_write(rt1308->regmap, 0xc300, 0x0b);
	}
	regmap_write(rt1308->regmap, 0xc900, 0x5a);
	regmap_write(rt1308->regmap, 0xc1a0, 0x84);
	regmap_write(rt1308->regmap, 0xc1a1, 0x01);
	regmap_write(rt1308->regmap, 0xc360, 0x78);
	regmap_write(rt1308->regmap, 0xc361, 0x87);
	regmap_write(rt1308->regmap, 0xc0a1, 0x71);
	regmap_write(rt1308->regmap, 0xc210, 0x00);
	regmap_write(rt1308->regmap, 0xc070, 0x00);
	regmap_write(rt1308->regmap, 0xc100, 0xd7);
	regmap_write(rt1308->regmap, 0xc101, 0xd7);

	/* apply BQ params */
	rt1308_apply_bq_params(rt1308);

	regmap_write(rt1308->regmap, 0xcf01, 0x01);

_preset_ready_:
	if (rt1308->first_hw_init) {
		regcache_cache_bypass(rt1308->regmap, false);
		regcache_mark_dirty(rt1308->regmap);
	} else
		rt1308->first_hw_init = true;

	/* Mark Slave initialization complete */
	rt1308->hw_init = true;

	pm_runtime_mark_last_busy(&slave->dev);
	pm_runtime_put_autosuspend(&slave->dev);

	dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);

	return ret;
}

static int rt1308_update_status(struct sdw_slave *slave,
					enum sdw_slave_status status)
{
	struct  rt1308_sdw_priv *rt1308 = dev_get_drvdata(&slave->dev);

	if (status == SDW_SLAVE_UNATTACHED)
		rt1308->hw_init = false;

	/*
	 * Perform initialization only if slave status is present and
	 * hw_init flag is false
	 */
	if (rt1308->hw_init || status != SDW_SLAVE_ATTACHED)
		return 0;

	/* perform I/O transfers required for Slave initialization */
	return rt1308_io_init(&slave->dev, slave);
}

static int rt1308_bus_config(struct sdw_slave *slave,
				struct sdw_bus_params *params)
{
	struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(&slave->dev);
	int ret;

	memcpy(&rt1308->params, params, sizeof(*params));

	ret = rt1308_clock_config(&slave->dev);
	if (ret < 0)
		dev_err(&slave->dev, "Invalid clk config");

	return ret;
}

static int rt1308_interrupt_callback(struct sdw_slave *slave,
					struct sdw_slave_intr_status *status)
{
	dev_dbg(&slave->dev,
		"%s control_port_stat=%x", __func__, status->control_port);

	return 0;
}

static int rt1308_classd_event(struct snd_soc_dapm_widget *w,
	struct snd_kcontrol *kcontrol, int event)
{
	struct snd_soc_component *component =
		snd_soc_dapm_to_component(w->dapm);
	struct rt1308_sdw_priv *rt1308 =
		snd_soc_component_get_drvdata(component);

	switch (event) {
	case SND_SOC_DAPM_POST_PMU:
		msleep(30);
		snd_soc_component_update_bits(component,
			RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4),
			0x3,	0x3);
		msleep(40);
		rt1308_apply_calib_params(rt1308);
		break;
	case SND_SOC_DAPM_PRE_PMD:
		snd_soc_component_update_bits(component,
			RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4),
			0x3, 0);
		usleep_range(150000, 200000);
		break;

	default:
		break;
	}

	return 0;
}

static const char * const rt1308_rx_data_ch_select[] = {
	"LR",
	"LL",
	"RL",
	"RR",
};

static SOC_ENUM_SINGLE_DECL(rt1308_rx_data_ch_enum,
	RT1308_SDW_OFFSET | (RT1308_DATA_PATH << 4), 0,
	rt1308_rx_data_ch_select);

static const struct snd_kcontrol_new rt1308_snd_controls[] = {

	/* I2S Data Channel Selection */
	SOC_ENUM("RX Channel Select", rt1308_rx_data_ch_enum),
};

static const struct snd_kcontrol_new rt1308_sto_dac_l =
	SOC_DAPM_SINGLE_AUTODISABLE("Switch",
		RT1308_SDW_OFFSET_BYTE3 | (RT1308_DAC_SET << 4),
		RT1308_DVOL_MUTE_L_EN_SFT, 1, 1);

static const struct snd_kcontrol_new rt1308_sto_dac_r =
	SOC_DAPM_SINGLE_AUTODISABLE("Switch",
		RT1308_SDW_OFFSET_BYTE3 | (RT1308_DAC_SET << 4),
		RT1308_DVOL_MUTE_R_EN_SFT, 1, 1);

static const struct snd_soc_dapm_widget rt1308_dapm_widgets[] = {
	/* Audio Interface */
	SND_SOC_DAPM_AIF_IN("AIF1RX", "DP1 Playback", 0, SND_SOC_NOPM, 0, 0),

	/* Supply Widgets */
	SND_SOC_DAPM_SUPPLY("MBIAS20U",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	7, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("ALDO",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	6, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("DBG",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	5, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("DACL",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	4, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("CLK25M",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	2, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("ADC_R",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	1, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("ADC_L",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	0, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("DAC Power",
		RT1308_SDW_OFFSET | (RT1308_POWER << 4),	3, 0, NULL, 0),

	SND_SOC_DAPM_SUPPLY("DLDO",
		RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4),	5, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("VREF",
		RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4),	4, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("MIXER_R",
		RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4),	2, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("MIXER_L",
		RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4),	1, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("MBIAS4U",
		RT1308_SDW_OFFSET_BYTE1 | (RT1308_POWER << 4),	0, 0, NULL, 0),

	SND_SOC_DAPM_SUPPLY("PLL2_LDO",
		RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 4, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("PLL2B",
		RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 3, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("PLL2F",
		RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 2, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("PLL2F2",
		RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 1, 0, NULL, 0),
	SND_SOC_DAPM_SUPPLY("PLL2B2",
		RT1308_SDW_OFFSET_BYTE2 | (RT1308_POWER << 4), 0, 0, NULL, 0),

	/* Digital Interface */
	SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
	SND_SOC_DAPM_SWITCH("DAC L", SND_SOC_NOPM, 0, 0, &rt1308_sto_dac_l),
	SND_SOC_DAPM_SWITCH("DAC R", SND_SOC_NOPM, 0, 0, &rt1308_sto_dac_r),

	/* Output Lines */
	SND_SOC_DAPM_PGA_E("CLASS D", SND_SOC_NOPM, 0, 0, NULL, 0,
		rt1308_classd_event,
		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
	SND_SOC_DAPM_OUTPUT("SPOL"),
	SND_SOC_DAPM_OUTPUT("SPOR"),
};

static const struct snd_soc_dapm_route rt1308_dapm_routes[] = {

	{ "DAC", NULL, "AIF1RX" },

	{ "DAC", NULL, "MBIAS20U" },
	{ "DAC", NULL, "ALDO" },
	{ "DAC", NULL, "DBG" },
	{ "DAC", NULL, "DACL" },
	{ "DAC", NULL, "CLK25M" },
	{ "DAC", NULL, "ADC_R" },
	{ "DAC", NULL, "ADC_L" },
	{ "DAC", NULL, "DLDO" },
	{ "DAC", NULL, "VREF" },
	{ "DAC", NULL, "MIXER_R" },
	{ "DAC", NULL, "MIXER_L" },
	{ "DAC", NULL, "MBIAS4U" },
	{ "DAC", NULL, "PLL2_LDO" },
	{ "DAC", NULL, "PLL2B" },
	{ "DAC", NULL, "PLL2F" },
	{ "DAC", NULL, "PLL2F2" },
	{ "DAC", NULL, "PLL2B2" },

	{ "DAC L", "Switch", "DAC" },
	{ "DAC R", "Switch", "DAC" },
	{ "DAC L", NULL, "DAC Power" },
	{ "DAC R", NULL, "DAC Power" },

	{ "CLASS D", NULL, "DAC L" },
	{ "CLASS D", NULL, "DAC R" },
	{ "SPOL", NULL, "CLASS D" },
	{ "SPOR", NULL, "CLASS D" },
};

static int rt1308_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
				int direction)
{
	snd_soc_dai_dma_data_set(dai, direction, sdw_stream);

	return 0;
}

static void rt1308_sdw_shutdown(struct snd_pcm_substream *substream,
				struct snd_soc_dai *dai)
{
	snd_soc_dai_set_dma_data(dai, substream, NULL);
}

static int rt1308_sdw_set_tdm_slot(struct snd_soc_dai *dai,
				   unsigned int tx_mask,
				   unsigned int rx_mask,
				   int slots, int slot_width)
{
	struct snd_soc_component *component = dai->component;
	struct rt1308_sdw_priv *rt1308 =
		snd_soc_component_get_drvdata(component);

	if (tx_mask)
		return -EINVAL;

	if (slots > 2)
		return -EINVAL;

	rt1308->rx_mask = rx_mask;
	rt1308->slots = slots;
	/* slot_width is not used since it's irrelevant for SoundWire */

	return 0;
}

static int rt1308_sdw_hw_params(struct snd_pcm_substream *substream,
	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
	struct snd_soc_component *component = dai->component;
	struct rt1308_sdw_priv *rt1308 =
		snd_soc_component_get_drvdata(component);
	struct sdw_stream_config stream_config = {0};
	struct sdw_port_config port_config = {0};
	struct sdw_stream_runtime *sdw_stream;
	int retval;

	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
	sdw_stream = snd_soc_dai_get_dma_data(dai, substream);

	if (!sdw_stream)
		return -EINVAL;

	if (!rt1308->sdw_slave)
		return -EINVAL;

	/* SoundWire specific configuration */
	snd_sdw_params_to_config(substream, params, &stream_config, &port_config);

	/* port 1 for playback */
	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		port_config.num = 1;
	else
		return -EINVAL;

	if (rt1308->slots) {
		stream_config.ch_count = rt1308->slots;
		port_config.ch_mask = rt1308->rx_mask;
	}

	retval = sdw_stream_add_slave(rt1308->sdw_slave, &stream_config,
				&port_config, 1, sdw_stream);
	if (retval) {
		dev_err(dai->dev, "Unable to configure port\n");
		return retval;
	}

	return retval;
}

static int rt1308_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
				struct snd_soc_dai *dai)
{
	struct snd_soc_component *component = dai->component;
	struct rt1308_sdw_priv *rt1308 =
		snd_soc_component_get_drvdata(component);
	struct sdw_stream_runtime *sdw_stream =
		snd_soc_dai_get_dma_data(dai, substream);

	if (!rt1308->sdw_slave)
		return -EINVAL;

	sdw_stream_remove_slave(rt1308->sdw_slave, sdw_stream);
	return 0;
}

/*
 * slave_ops: callbacks for get_clock_stop_mode, clock_stop and
 * port_prep are not defined for now
 */
static const struct sdw_slave_ops rt1308_slave_ops = {
	.read_prop = rt1308_read_prop,
	.interrupt_callback = rt1308_interrupt_callback,
	.update_status = rt1308_update_status,
	.bus_config = rt1308_bus_config,
};

static int rt1308_sdw_parse_dt(struct rt1308_sdw_priv *rt1308, struct device *dev)
{
	int ret = 0;

	device_property_read_u32(dev, "realtek,bq-params-cnt", &rt1308->bq_params_cnt);
	if (rt1308->bq_params_cnt) {
		rt1308->bq_params = devm_kzalloc(dev, rt1308->bq_params_cnt, GFP_KERNEL);
		if (!rt1308->bq_params) {
			dev_err(dev, "Could not allocate bq_params memory\n");
			ret = -ENOMEM;
		} else {
			ret = device_property_read_u8_array(dev, "realtek,bq-params", rt1308->bq_params, rt1308->bq_params_cnt);
			if (ret < 0)
				dev_err(dev, "Could not read list of realtek,bq-params\n");
		}
	}

	dev_dbg(dev, "bq_params_cnt=%d\n", rt1308->bq_params_cnt);
	return ret;
}

static int rt1308_sdw_component_probe(struct snd_soc_component *component)
{
	struct rt1308_sdw_priv *rt1308 = snd_soc_component_get_drvdata(component);
	int ret;

	rt1308->component = component;
	rt1308_sdw_parse_dt(rt1308, &rt1308->sdw_slave->dev);

	if (!rt1308->first_hw_init)
		return 0;

	ret = pm_runtime_resume(component->dev);
	if (ret < 0 && ret != -EACCES)
		return ret;

	/* apply BQ params */
	rt1308_apply_bq_params(rt1308);

	return 0;
}

static const struct snd_soc_component_driver soc_component_sdw_rt1308 = {
	.probe = rt1308_sdw_component_probe,
	.controls = rt1308_snd_controls,
	.num_controls = ARRAY_SIZE(rt1308_snd_controls),
	.dapm_widgets = rt1308_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(rt1308_dapm_widgets),
	.dapm_routes = rt1308_dapm_routes,
	.num_dapm_routes = ARRAY_SIZE(rt1308_dapm_routes),
	.endianness = 1,
};

static const struct snd_soc_dai_ops rt1308_aif_dai_ops = {
	.hw_params = rt1308_sdw_hw_params,
	.hw_free	= rt1308_sdw_pcm_hw_free,
	.set_stream	= rt1308_set_sdw_stream,
	.shutdown	= rt1308_sdw_shutdown,
	.set_tdm_slot	= rt1308_sdw_set_tdm_slot,
};

#define RT1308_STEREO_RATES SNDRV_PCM_RATE_48000
#define RT1308_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S16_LE | \
			SNDRV_PCM_FMTBIT_S24_LE)

static struct snd_soc_dai_driver rt1308_sdw_dai[] = {
	{
		.name = "rt1308-aif",
		.playback = {
			.stream_name = "DP1 Playback",
			.channels_min = 1,
			.channels_max = 2,
			.rates = RT1308_STEREO_RATES,
			.formats = RT1308_FORMATS,
		},
		.ops = &rt1308_aif_dai_ops,
	},
};

static int rt1308_sdw_init(struct device *dev, struct regmap *regmap,
				struct sdw_slave *slave)
{
	struct rt1308_sdw_priv *rt1308;
	int ret;

	rt1308 = devm_kzalloc(dev, sizeof(*rt1308), GFP_KERNEL);
	if (!rt1308)
		return -ENOMEM;

	dev_set_drvdata(dev, rt1308);
	rt1308->sdw_slave = slave;
	rt1308->regmap = regmap;

	regcache_cache_only(rt1308->regmap, true);

	/*
	 * Mark hw_init to false
	 * HW init will be performed when device reports present
	 */
	rt1308->hw_init = false;
	rt1308->first_hw_init = false;

	ret =  devm_snd_soc_register_component(dev,
				&soc_component_sdw_rt1308,
				rt1308_sdw_dai,
				ARRAY_SIZE(rt1308_sdw_dai));
	if (ret < 0)
		return ret;

	/* set autosuspend parameters */
	pm_runtime_set_autosuspend_delay(dev, 3000);
	pm_runtime_use_autosuspend(dev);

	/* make sure the device does not suspend immediately */
	pm_runtime_mark_last_busy(dev);

	pm_runtime_enable(dev);

	/* important note: the device is NOT tagged as 'active' and will remain
	 * 'suspended' until the hardware is enumerated/initialized. This is required
	 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
	 * fail with -EACCESS because of race conditions between card creation and enumeration
	 */

	dev_dbg(dev, "%s\n", __func__);

	return 0;
}

static int rt1308_sdw_probe(struct sdw_slave *slave,
				const struct sdw_device_id *id)
{
	struct regmap *regmap;

	/* Regmap Initialization */
	regmap = devm_regmap_init_sdw(slave, &rt1308_sdw_regmap);
	if (IS_ERR(regmap))
		return PTR_ERR(regmap);

	return rt1308_sdw_init(&slave->dev, regmap, slave);
}

static int rt1308_sdw_remove(struct sdw_slave *slave)
{
	pm_runtime_disable(&slave->dev);

	return 0;
}

static const struct sdw_device_id rt1308_id[] = {
	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1308, 0x2, 0, 0),
	{},
};
MODULE_DEVICE_TABLE(sdw, rt1308_id);

static int __maybe_unused rt1308_dev_suspend(struct device *dev)
{
	struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);

	if (!rt1308->hw_init)
		return 0;

	regcache_cache_only(rt1308->regmap, true);

	return 0;
}

#define RT1308_PROBE_TIMEOUT 5000

static int __maybe_unused rt1308_dev_resume(struct device *dev)
{
	struct sdw_slave *slave = dev_to_sdw_dev(dev);
	struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);
	unsigned long time;

	if (!rt1308->first_hw_init)
		return 0;

	if (!slave->unattach_request)
		goto regmap_sync;

	time = wait_for_completion_timeout(&slave->initialization_complete,
				msecs_to_jiffies(RT1308_PROBE_TIMEOUT));
	if (!time) {
		dev_err(&slave->dev, "Initialization not complete, timed out\n");
		sdw_show_ping_status(slave->bus, true);

		return -ETIMEDOUT;
	}

regmap_sync:
	slave->unattach_request = 0;
	regcache_cache_only(rt1308->regmap, false);
	regcache_sync_region(rt1308->regmap, 0xc000, 0xcfff);

	return 0;
}

static const struct dev_pm_ops rt1308_pm = {
	SET_SYSTEM_SLEEP_PM_OPS(rt1308_dev_suspend, rt1308_dev_resume)
	SET_RUNTIME_PM_OPS(rt1308_dev_suspend, rt1308_dev_resume, NULL)
};

static struct sdw_driver rt1308_sdw_driver = {
	.driver = {
		.name = "rt1308",
		.owner = THIS_MODULE,
		.pm = &rt1308_pm,
	},
	.probe = rt1308_sdw_probe,
	.remove = rt1308_sdw_remove,
	.ops = &rt1308_slave_ops,
	.id_table = rt1308_id,
};
module_sdw_driver(rt1308_sdw_driver);

MODULE_DESCRIPTION("ASoC RT1308 driver SDW");
MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
MODULE_LICENSE("GPL v2");