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[
{
"EventName": "ACCESS_MMU_STLB",
"EventCode": "0x1",
"BriefDescription": "access MMU STLB"
},
{
"EventName": "MISS_MMU_STLB",
"EventCode": "0x2",
"BriefDescription": "miss MMU STLB"
},
{
"EventName": "ACCESS_MMU_PTE_C",
"EventCode": "0x3",
"BriefDescription": "access MMU PTE-Cache"
},
{
"EventName": "MISS_MMU_PTE_C",
"EventCode": "0x4",
"BriefDescription": "miss MMU PTE-Cache"
},
{
"EventName": "ROB_FLUSH",
"EventCode": "0x5",
"BriefDescription": "ROB flush (all kinds of exceptions)"
},
{
"EventName": "BTB_PREDICTION_MISS",
"EventCode": "0x6",
"BriefDescription": "BTB prediction miss"
},
{
"EventName": "ITLB_MISS",
"EventCode": "0x7",
"BriefDescription": "ITLB miss"
},
{
"EventName": "SYNC_DEL_FETCH_G",
"EventCode": "0x8",
"BriefDescription": "SYNC delivery a fetch-group"
},
{
"EventName": "ICACHE_MISS",
"EventCode": "0x9",
"BriefDescription": "ICache miss"
},
{
"EventName": "BPU_BR_RETIRE",
"EventCode": "0xA",
"BriefDescription": "condition branch instruction retire"
},
{
"EventName": "BPU_BR_MISS",
"EventCode": "0xB",
"BriefDescription": "condition branch instruction miss"
},
{
"EventName": "RET_INS_RETIRE",
"EventCode": "0xC",
"BriefDescription": "return instruction retire"
},
{
"EventName": "RET_INS_MISS",
"EventCode": "0xD",
"BriefDescription": "return instruction miss"
},
{
"EventName": "INDIRECT_JR_MISS",
"EventCode": "0xE",
"BriefDescription": "indirect JR instruction miss (inlcude without target)"
},
{
"EventName": "IBUF_VAL_ID_NORDY",
"EventCode": "0xF",
"BriefDescription": "IBUF valid while ID not ready"
},
{
"EventName": "IBUF_NOVAL_ID_RDY",
"EventCode": "0x10",
"BriefDescription": "IBUF not valid while ID ready"
},
{
"EventName": "REN_INT_PHY_REG_NORDY",
"EventCode": "0x11",
"BriefDescription": "REN integer physical register file is not ready"
},
{
"EventName": "REN_FP_PHY_REG_NORDY",
"EventCode": "0x12",
"BriefDescription": "REN floating point physical register file is not ready"
},
{
"EventName": "REN_CP_NORDY",
"EventCode": "0x13",
"BriefDescription": "REN checkpoint is not ready"
},
{
"EventName": "DEC_VAL_ROB_NORDY",
"EventCode": "0x14",
"BriefDescription": "DEC is valid and ROB is not ready"
},
{
"EventName": "OOD_FLUSH_LS_DEP",
"EventCode": "0x15",
"BriefDescription": "out of order flush due to load/store dependency"
},
{
"EventName": "BRU_RET_IJR_INS",
"EventCode": "0x16",
"BriefDescription": "BRU retire an IJR instruction"
},
{
"EventName": "ACCESS_DTLB",
"EventCode": "0x17",
"BriefDescription": "access DTLB"
},
{
"EventName": "MISS_DTLB",
"EventCode": "0x18",
"BriefDescription": "miss DTLB"
},
{
"EventName": "LOAD_INS_DCACHE",
"EventCode": "0x19",
"BriefDescription": "load instruction access DCache"
},
{
"EventName": "LOAD_INS_MISS_DCACHE",
"EventCode": "0x1A",
"BriefDescription": "load instruction miss DCache"
},
{
"EventName": "STORE_INS_DCACHE",
"EventCode": "0x1B",
"BriefDescription": "store/amo instruction access DCache"
},
{
"EventName": "STORE_INS_MISS_DCACHE",
"EventCode": "0x1C",
"BriefDescription": "store/amo instruction miss DCache"
},
{
"EventName": "LOAD_SCACHE",
"EventCode": "0x1D",
"BriefDescription": "load access SCache"
},
{
"EventName": "STORE_SCACHE",
"EventCode": "0x1E",
"BriefDescription": "store access SCache"
},
{
"EventName": "LOAD_MISS_SCACHE",
"EventCode": "0x1F",
"BriefDescription": "load miss SCache"
},
{
"EventName": "STORE_MISS_SCACHE",
"EventCode": "0x20",
"BriefDescription": "store miss SCache"
},
{
"EventName": "L2C_PF_REQ",
"EventCode": "0x21",
"BriefDescription": "L2C data-prefetcher request"
},
{
"EventName": "L2C_PF_HIT",
"EventCode": "0x22",
"BriefDescription": "L2C data-prefetcher hit"
}
]
|
