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Add the description for the display panel found on this phone.
Unfortunately the LCDB module on PMI632 isn't yet supported upstream so
we need to use a dummy regulator-fixed in the meantime.
And with this done we can also enable the GPU and set the zap shader
firmware path.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Link: https://lore.kernel.org/r/20250611-fp3-display-v4-4-ef67701e7687@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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QUPv3 in IPQ5424 consists of six Serial Engines (SEs). Describe the
first SE, which supports a 4-wire UART configuration suitable for
applications such as HS-UART.
Note that the required initialization for this SE is not handled by the
bootloader. Therefore, add the SE node in the device tree but keep it
reserved. Enable it once Linux gains support for configuring the SE,
allowing to use in relevant RDPs.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250812-ipq5424_hsuart-v4-1-f1faa7704ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
- Add a mitigation for a cache coherency vulnerability when running an
SNP guest which makes sure all cache lines belonging to a 4K page are
evicted after latter has been converted to a guest-private page
[ SNP: Secure Nested Paging - not to be confused with Single Nucleotide
Polymorphism, which is the more common use of that TLA. I am on a
mission to write out the more obscure TLAs in order to keep track of
them.
Because while math tells us that there are only about 17k different
combinations of three-letter acronyms using English letters (26^3), I
am convinced that somehow Intel, AMD and ARM have together figured out
new mathematics, and have at least a million different TLAs that they
use. - Linus ]
* tag 'snp_cache_coherency' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/sev: Evict cache lines during SNP memory validation
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The SC7280 SoC now supports two additional frequencies. This patch
add those frequencies to the BWMON OPP table and updates the frequency
mapping table accordingly.
These changes do not impact existing platforms, as the updated mapping
only affects the highest OPP. On any given platform, this will continue
to vote for the maximum available OPP.
Signed-off-by: Pushpendra Singh <quic_pussin@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250702000120.2902158-1-quic_pussin@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Like on other platforms, if the OS does not support recovering the state
left by the bootloader it needs access to MDSS_CORE, so that it can
clear the MDSS configuration.
Until now it seems no version of the bootloaders have done so, but e.g.
the Particle Tachyon ships with a bootloader that does leave the display
in a state that results in a series of iommu faults.
So let's provide the reset, to allow the OS to clear that state.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250811-sc7280-mdss-reset-v1-3-83ceff1d48de@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Only one PCIe controller has been described so far, but the SC7280 has
two controllers/phys. Describe the second one as well.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250811-sc7280-pcie0-v1-1-6093e5b208f9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe perisys-apb4-hclk as the APB clock for TH1520 SoC, which is
essential for accessing GMAC glue registers.
Fixes: 7e756671a664 ("riscv: dts: thead: Add TH1520 ethernet nodes")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Drew Fustini <fustini@kernel.org>
Tested-by: Drew Fustini <fustini@kernel.org>
Link: https://patch.msgid.link/20250808093655.48074-5-ziyao@disroot.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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Currently, when a Secure TSC enabled SNP guest attempts to write to the
intercepted GUEST_TSC_FREQ MSR (a read-only MSR), the guest kernel response
incorrectly implies a VMM configuration error, when in fact it is the usual
VMM configuration to intercept writes to read-only MSRs, unless explicitly
documented.
Modify the intercepted TSC MSR #VC handling:
* Write to GUEST_TSC_FREQ will generate a #GP instead of terminating the
guest
* Write to MSR_IA32_TSC will generate a #GP instead of silently ignoring it
However, continue to terminate the guest when reading from intercepted
GUEST_TSC_FREQ MSR with Secure TSC enabled, as intercepted reads indicate an
improper VMM configuration for Secure TSC enabled SNP guests.
[ bp: simplify comment. ]
Fixes: 38cc6495cdec ("x86/sev: Prevent GUEST_TSC_FREQ MSR interception for Secure TSC enabled guests")
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/20250722074853.22253-1-nikunj@amd.com
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bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT. Add bootph-all for all nodes that are used in the
bootloader on Renesas RZ/A1 SoCs.
All SoCs require BSC bus, PFC pin control, and OSTM0 timer access during
all stages of the boot process, those are marked using bootph-all
property, and so is the SoC bus node which contains the PFC and OSTM
IPs.
Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250806150448.9669-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Retronix R-Car V4H Sparrow Hawk EVTA1 is populated with Spansion
S25FS512S, EVTB1 is populated with Winbond W77Q51NW. Describe the SPI
NOR using the generic "jedec,spi-nor" compatible, because both FLASHes
can be auto-detected based on their built-in IDs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250806150048.9364-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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On RZ/G2LC SMARC EVK, CAN-FD channel0 is not populated, and currently we
are deleting a wrong and nonexistent node. Fixing the wrong node would
invoke a dtb warning message, as channel0 is a required property.
Disable CAN-FD channel0 instead of deleting the node.
Fixes: 46da632734a5 ("arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250801121959.267424-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add nodes for the DMAC IPs found on the Renesas RZ/G3E SoC.
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250801084825.471011-4-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Move the article "the" before the full name of the board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/280176885acf46d117a0ab9a02c314e2b5cf250f.1753950938.git.geert+renesas@glider.be
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Add the SDHI0-SDHI1 nodes to the RZ/N2H ("R9A09G087") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250707153533.287832-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add the SDHI0-SDHI1 nodes to the RZ/T2H ("R9A09G077") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250707153533.287832-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The Renesas RZ/N2H ("R9A09G087") SoC includes three I2C (RIIC) channels.
Add device tree nodes for all three I2C controllers to the RZ/N2H SoC
DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250707153533.287832-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The Renesas RZ/T2H ("R9A09G077") SoC includes three I2C (RIIC) channels.
Add device tree nodes for all three I2C controllers to the RZ/T2H SoC
DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250707153533.287832-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The qcom_stats driver allows querying sleep stats from various
remoteprocs. Add a node to enable it.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250801-sm6350-rpmh-stats-v1-1-f1fb649d1095@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Enable USB audio offloading which allows to play audio via a USB-C
headset with lower power consumption and enabling some other features.
This can be used like the following:
$ amixer -c0 cset name='USB_RX Audio Mixer MultiMedia1' On
$ aplay --device=plughw:0,0 test.wav
Compared to regular playback to the USB sound card no xhci-hcd
interrupts appear during playback, instead the ADSP will be handling the
USB transfers.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250801-fp5-usb-audio-offload-v1-2-240fc213d3d3@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add a node for q6usb which handles USB audio offloading, allowing to
play audio via a USB-C headset with lower power consumption and enabling
some other features.
We also need to set num-hc-interrupters for the dwc3 for the q6usb to be
able to use its sideband interrupter.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250801-fp5-usb-audio-offload-v1-1-240fc213d3d3@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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DP supplies were migrated to the corresponding DP PHY. Drop them from
the DP controller node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250724-move-edp-endpoints-v1-5-6ca569812838@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Support for the data-lanes declaration in the DP node is deprecated.
Move them to the corresponding endpoint as recommended by the current DP
bindings.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250724-move-edp-endpoints-v1-4-6ca569812838@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Follow the example of other DP controllers and also eDP controller on
SC7280 and move mdss_dp3_out endpoint declaration to the SoC
DTSI. This slightly reduces the boilerplate in the platform DT files and
also reduces the difference between DP and eDP controllers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250724-move-edp-endpoints-v1-3-6ca569812838@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Follow the example of other DP controllers and also eDP controller on
SC7280 and move all mdss[01]_dp[0123]_out endpoints declaration to the
SoC DTSI. This slightly reduces the boilerplate in the platform DT files
and also reduces the difference between DP and eDP controllers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250724-move-edp-endpoints-v1-2-6ca569812838@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Follow the example of other DP controllers and also eDP controller on
SC7280 and move mdss_edp_out endpoint declaration to the SoC DTSI. This
slightly reduces the boilerplate in the platform DT files and also
reduces the difference between DP and eDP controllers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250724-move-edp-endpoints-v1-1-6ca569812838@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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SA8775p supports 'link_down' reset on hardware, so add it for both pcie0
and pcie1, which can provide a better user experience.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250725102231.3608298-4-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The gcc_aux_clk is used by the PCIe Root Complex (RC) and is not required
by the PHY. The correct clock for the PHY is gcc_phy_aux_clk, which this
patch uses to replace the incorrect reference.
The distinction between AUX_CLK and PHY_AUX_CLK is important: AUX_CLK is
typically used by the controller, while PHY_AUX_CLK is required by certain
PHYs—particularly Gen4 QMP PHYs—for internal operations such as clock
gating and power management. Some non-Gen4 Qualcomm PHYs also use
PHY_AUX_CLK, but they do not require AUX_CLK.
This change ensures proper clock configuration and avoids unnecessary
dependencies.
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Fixes: 489f14be0e0a ("arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250725102231.3608298-3-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Flatten usb controller nodes and update to using latest bindings
and flattened driver approach.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> # FP5
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250728035812.2762957-1-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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sc7280.dtsi already includes the very same definition (bar 'memory@'
vs 'video@', which doesn't matter). Remove the duplicate to fix a lot
of dtbs W=1 warning instances (unique_unit_address_if_enabled).
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250728-topic-chrome_dt_fixup-v1-1-1fc38a95d5ea@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The host controller supports HS200/HS400 and HS400 enhanced strobe mode.
On RB1, this improves Linux eMMC read speed, from ~170MB/s to 300MB/s.
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250728093426.1413379-1-loic.poulain@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add ADSP and CDSP fastrpc nodes for SM6150 platform.
Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250729031259.4190916-1-quic_lxu5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Update GPU node to include acd level values.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250729-topic-sm8650-upstream-gpu-acd-level-v1-1-258090038a41@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Allow configuration of download mode via qcom_scm driver via specifying
download mode register address in the TCSR space. It is especially useful
for a clean watchdog reset without entry into download mode.
The problem remained un-noticed until now since error reporting for
missing download mode configuration feature was explicitly suppressed.
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250730132230.247727-1-sumit.garg@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Use the definition for qcom,msm-id and put them into the common dtsi.
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250801-sdm845-msmid-v2-2-9f44d125ee44@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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For all boards it's QCOM_ID_SDM845 except Dragonboard, where it's
QCOM_ID_SDA845.
Except for OnePlus 6 / 6T, which is handled in following commit.
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250801-sdm845-msmid-v2-1-9f44d125ee44@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The Pixel 3a has a rechargeable 3000 mAh battery. Describe it and enable
its charging controller in PM660.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630224158.249726-2-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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When no link frequencies are set, msm/dp driver defaults to HBR2 speed.
Explicitly list supported frequencies including HBR3/8.1Gbps for all
external DisplayPort(s).
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630205514.14022-3-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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When no link frequencies are set, msm/dp driver defaults to HBR2 speed.
Explicitly list supported frequencies including HBR3/8.1Gbps for all
external DisplayPort(s).
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250630205514.14022-2-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add support for the touchkeys on the Samsung Galaxy Note 3 (hlte).
Signed-off-by: Adam Honse <calcprogrammer1@gmail.com>
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250618-hlte-touchkey-v2-1-2cf188b57e31@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Use the same definition as pm8058.dtsi. Since vibrator is used only by
some devices, disable it by default and let it be enabled explicitly.
Signed-off-by: Shinjo Park <peremen@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250613194253.20080-1-peremen@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add initial device tree support for the Sony Xperia SP (codename:
sony-huashan), a smartphone based on the Qualcomm MSM8960T SoC.
There are two variants of the Xperia SP, one without LTE and one with
LTE. This device tree should work for both variants, though it has only
been tested on the non-LTE variant.
The following are currently supported:
- Serial console support via gsbi8
- GPIO keys for volume up/down buttons
- PM8921 keypad with camera focus/capture keys
- eMMC (sdcc1) and micro SD card (sdcc3) support
- USB OTG support
Other hardware features are not yet implemented.
Booting notes:
Booting a kernel requires using the Sony ELF boot image format, which
embeds the kernel, ramdisk, RPM firmware, and cmdline. This can be
created using the `mkelf` tool. For example:
python2 mkelf.py -o boot.img \
kernel+dtb@0x80208000 \
ramdisk.img@0x81900000 \
RPM.bin@0x00020000,rpm \
cmdline.txt@cmdline
The resulting `boot.img` can then be flashed via fastboot. A detailed
guide, including an alternative method, is available at:
https://wiki.postmarketos.org/wiki/Sony_Xperia_SP_(sony-huashan)
Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250623-msm8960-sdcard-v2-5-340a5e8f7df0@smankusors.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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clock-frequency in camera sensor node
The clock-frequency for camera sensors has been deprecated in favour of
the assigned-clocks and assigned-clock-rates properties. Replace it in
the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250710174808.5361-13-laurent.pinchart@ideasonboard.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The X1E80100 CRD has a Goodix fingerprint reader connected to the USB
multiport controller on eUSB6. All other ports (including USB super-speed
pins) are unused.
Set it up in the device tree together with the NXP PTN3222 repeater.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250714-x1e80100-crd-fp-v2-1-3246eb02b679@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Flatten usb controller node and update to using latest bindings
and flattened driver approach.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250715052739.3831549-3-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250715052739.3831549-2-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Enable sdhc1 support for qcs8300 ride platform.
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250716085125.27169-3-quic_sayalil@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add eMMC support for qcs8300 board.
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250716085125.27169-2-quic_sayalil@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Cheza was a prototype board, used mainly by the ChromeOS folks, whose
former efforts on making linux-arm-msm better we greatly appreciate.
There are close to zero known-working devices at this point in time
(see the link below) and it was never productized.
Remove it to ease maintenance burden.
Link: https://lore.kernel.org/linux-arm-msm/5567e441-055d-443a-b117-ec16b53dc059@oss.qualcomm.com/
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250716-topic-goodnight_cheza-v2-1-6fa8d3261813@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add the CPU BWMONs for SM8750 SoCs.
Notably, the one related to cluster0 requires that it's mapped with
the nE memory attribute. This is specific to a single instance, on this
platform only and should not be mimicked elsewhere.
Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
[konrad: add nonposted-mmio where necessary, re-sort nodes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250716-8750_cpubwmon-v4-2-12212098e90f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Added max design microvolt. Merged battery info into one node,
since pmic fuel-gauge uses mixed info about dual-cell battery.
Reviewed-by: Luka Panio <lukapanio@gmail.com>
Signed-off-by: Arseniy Velikanov <me@adomerle.pw>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250716141041.24507-3-me@adomerle.pw
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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