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path: root/drivers/platform/x86/intel/pmc
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2024-08-12platform/x86/intel/pmc: Show live substate requirementsKane Chen
While debugging runtime s0ix, we do need to check which required IPs are not power gated. This patch adds code to show live substate status vs requirements in sys/kernel/debug/pmc_core/substate_requirements to help runtime s0ix debug. Signed-off-by: Kane Chen <kane.chen@intel.com> Link: https://lore.kernel.org/r/20240719122807.3853292-1-kane.chen@intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-07-17Merge tag 'platform-drivers-x86-v6.11-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Ilpo Järvinen: - amd/pmf: Report system state changes using existing input events - asus-wmi: Zenbook 2023 camera LED disable support and fix TUF laptop keyboard RGB LED sysfs interface - dell-pc: Fan modes / platform profile support - hp-wmi: Fix platform profile switching on Omen/Victus laptops - intel/ISST: Use only TPMI interface when TPMI and legacy interfaces are available - intel/pmc: LTR restore support to pair with LTR ignore - intel/tpmi: Performance Limit Reasons (PLR) and APIC <-> Punit CPU numbering mapping support - WMI: driver override support and docs improvements - lenovo-yoga-c630: Support for EC (platform/arm64) - platform/arm64: Fix build with COMPILE_TEST (broke after addition of C630) - tools: Intel Speed Select Turbo Ratio Limit fix - Miscellaneous cleanups / refactoring / improvements * tag 'platform-drivers-x86-v6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (65 commits) platform/x86: asus-wmi: fix TUF laptop RGB variant platform/x86/intel/tpmi/plr: Fix output in plr_print_bits() Docs/admin-guide: Remove pmf leftover reference from the index platform/x86: ideapad-laptop: use cleanup.h platform/x86: hp-wmi: Fix implementation of the platform_profile_omen_get function platform: arm64: EC_LENOVO_YOGA_C630 should depend on ARCH_QCOM platform: arm64: EC_ACER_ASPIRE1 should depend on ARCH_QCOM platform/x86/amd/pmf: Remove update system state document platform/x86/amd/pmf: Use existing input event codes to update system states platform/x86: hp-wmi: Fix platform profile option switch bug on Omen and Victus laptops platform/x86:intel/pmc: Add support to undo ltr_ignore platform/x86:intel/pmc: Use the Elvis operator platform/x86:intel/pmc: Use DEFINE_SHOW_STORE_ATTRIBUTE macro platform/x86:intel/pmc: Remove unneeded min_t check platform/x86:intel/pmc: Add support to show ltr_ignore value platform/x86:intel/pmc: Move pmc assignment closer to first usage platform/x86:intel/pmc: Convert index variables to be unsigned platform/x86:intel/pmc: Simplify mutex usage with cleanup helpers platform/x86:intel/pmc: Use the return value of pmc_core_send_msg tools/power/x86/intel-speed-select: v1.20 release ...
2024-07-08platform/x86:intel/pmc: Add support to undo ltr_ignoreXi Pardee
Add ltr_restore support to undo the ltr_ignore action. It sets the ltr_ignore bit of the corresponding IP to 0. Ltr_restore reuses some functionality of pmc_core_ltr_ignore_write() so moved the common functionality into a helper function. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-10-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Use the Elvis operatorXi Pardee
Replace ternary operator with Elvis operator in pmc_core_ltr_ignore_write() for better readability of the code. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-9-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Use DEFINE_SHOW_STORE_ATTRIBUTE macroXi Pardee
DEFINE_SHOW_STORE_ATTRIBUTE() macro can be used for the ltr_ignore attribute for better readability. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-8-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Remove unneeded min_t checkXi Pardee
min_t() check is not needed in pmc_core_ltr_ignore_write(). kstrtox() has a built-in overflow check. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-7-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Add support to show ltr_ignore valueXi Pardee
Add a column in ltr_show output to show if the IP has been ignored. A mutex lock is used to protect the critical section as other processes might try to write to the LTR ignore register at the same time. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-6-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Move pmc assignment closer to first usageXi Pardee
Move pmc variable assignment closer to the conditional statement of its first use for better readability. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-5-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Convert index variables to be unsignedXi Pardee
Convert the index variables type to unsigned to avoid confusion and errors. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-4-xi.pardee@linux.intel.com [ij: Converted also pmc_core_lpm_get_arr_size() to return unsigned int] Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Simplify mutex usage with cleanup helpersXi Pardee
Use macros defined in cleanup.h to automate the mutex lock/unlock flow. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-3-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-07-08platform/x86:intel/pmc: Use the return value of pmc_core_send_msgXi Pardee
Use the return value of pmc_core_send_msg() directly instead of assigning another code when an error occurs. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Link: https://lore.kernel.org/r/20240624203218.2428475-2-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-24platform/x86/intel: add missing MODULE_DESCRIPTION() macrosJeff Johnson
With ARCH=x86, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/intel/pmc/intel_pmc_core_pltdrv.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/intel/intel-hid.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/intel/intel-vbtn.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/intel/intel-rst.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/intel/intel-smartconnect.o Add the missing invocations of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Link: https://lore.kernel.org/r/20240611-md-drivers-platform-x86-intel-v1-1-5ed967425b04@quicinc.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-06-03platform/x86/intel/pmc: Switch to new Intel CPU model definesTony Luck
New CPU #defines encode vendor and family as well as model. Signed-off-by: Tony Luck <tony.luck@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20240531203706.233365-2-tony.luck@intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-04-29platform/x86:intel/pmc: Enable S0ix blocker show in Lunar LakeXi Pardee
Update Lunar Lake lpm maps to include S0ix blocker information. Add Lunar Lake blocker maps to enable S0ix blocker show in pmc core debugfs. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20240426002752.2504282-4-xi.pardee@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-04-29platform/x86:intel/pmc: Add support to show S0ix blocker counterXi Pardee
S0ix blocker counter is available in PWRM space. Add support to read and show S0ix blocker counter value through debugfs. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20240426002752.2504282-3-xi.pardee@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-04-29platform/x86:intel/pmc: Update LNL signal status mapXi Pardee
Update Lunar Lake signal status map. This status map has been updated since the map was merged. This patch updates the signal status map to the lastest version. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20240426002752.2504282-2-xi.pardee@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-04-29platform/x86/intel/pmc: Fix PCH names in commentsColin Ian King
The PCH names in the pmc drivers are incorrect in the comments, fix these. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://lore.kernel.org/r/20240418215202.879171-1-colin.i.king@gmail.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-03-12platform/x86/intel/pmc: Improve PKGC residency counters debugKane Chen
The current code only prints PKGC-10 residency when the PKGC-10 is not reached in previous 'freeze' attempt. To debug PKGC-10 issues, we also need to know other PKGC residency counters to better triage issues. Ex: 1. When system is stuck in PC2, it can be caused short LTR from device. 2. When system is stuck in PC8, it can be caused by display engine. To better triage issues, all PKGC residency are needed when issues happen. Example log: CPU did not enter Package C10!!! (Package C10 cnt=0x0) Prev Package C2 cnt = 0x2191a325de, Current Package C2 cnt = 0x21aba30724 Prev Package C3 cnt = 0x0, Current Package C3 cnt = 0x0 Prev Package C6 cnt = 0x0, Current Package C6 cnt = 0x0 Prev Package C7 cnt = 0x0, Current Package C7 cnt = 0x0 Prev Package C8 cnt = 0x0, Current Package C8 cnt = 0x0 Prev Package C9 cnt = 0x0, Current Package C9 cnt = 0x0 Prev Package C10 cnt = 0x0, Current Package C10 cnt = 0x0 With this log, we can know whether it's a stuck PC2 issue, and we can check whether the short LTR from device causes the issue. Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20240308033127.1013053-1-kane.chen@intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-03-12platform/x86/intel/pmc/arl: Put GNA device in D3David E. Box
As is the case on Meteor Lake, the Gaussian & Neural Accelerator (GNA) device is powered by BIOS to D0 by default. If no driver is loaded, this will cause the Package C state to be limited to PC2, leading to significant power consumption and decrease in batter life. Put the GNA device in D3 by default if no driver is loaded for it. Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver") Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Link: https://lore.kernel.org/r/20240227190134.1592072-3-david.e.box@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-03-12platform/x86/intel/pmc/lnl: Remove SSRAM supportDavid E. Box
A recent PMC firmware change in Lunar Lake caused the pmc_core driver to fail to probe. This is due to a change in the GUID for PMC telemetry coming from the SSRAM device. Until a final release is ready this value may change again. In the meantime, disable the SSRAM support for Lunar Lake so the driver can load and provide some basic functionality. Fixes: 3748dfdae2a6 ("platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driver") Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20240227190134.1592072-2-david.e.box@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-01-02platform/x86/intel/pmc: Add missing externDavid E. Box
Add missing extern for tgl_h_reg_map. Fixes sparse warning: drivers/platform/x86/intel/pmc/tgl.c:213:26: warning: symbol 'tgl_h_reg_map' was not declared. Should it be static? Fixes: 544f7b7f651c ("platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH") Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-9-david.e.box@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-01-02platform/x86/intel/pmc/lnl: Add GBE LTR ignore during suspendDavid E. Box
Add the GBE LTR ignore suspend time fix for Lunar Lake. Fixes: 119652b855e6 ("platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driver") Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-8-david.e.box@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-01-02platform/x86/intel/pmc/arl: Add GBE LTR ignore during suspendDavid E. Box
Add the GBE LTR ignore suspend time fix for Arrow Lake. Fixes: f34dcf397286 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver") Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-7-david.e.box@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2024-01-02Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-nextHans de Goede
Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next so that the "Intel PMC GBE LTR regression" fixes can also be applied to the new Arrow Lake and Lunar Lake platform support code in pdx86/for-next .
2023-12-29platform/x86/intel/pmc: Move GBE LTR ignore to suspend callbackDavid E. Box
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added at probe. This was needed in order to allow the SoC to enter the deepest Package C state. To fix the regression and at least support PC10 during suspend, move the LTR ignore from probe to the suspend callback, and enable it again on resume. This solution will allow PC10 during suspend but restrict Package C entry at runtime to no deeper than PC8/9 while a network cable it attach to the PCH LAN. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-6-david.e.box@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-29platform/x86/intel/pmc: Allow reenabling LTRsDavid E. Box
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added during probe. The fix will move the ignore to occur at suspend-time (so as to not affect suspend power). This will require the ability to enable the LTR again on resume. Modify pmc_core_send_ltr_ignore() to allow enabling an LTR. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-5-david.e.box@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-29platform/x86/intel/pmc: Add suspend callbackDavid E. Box
Add a suspend callback to struct pmc for performing platform specific tasks before device suspend. This is needed in order to perform GBE LTR ignore on certain platforms at suspend-time instead of at probe-time and replace the GBE LTR ignore removal that was done in order to fix a bug introduced by commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()"). Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231223032548.1680738-4-david.e.box@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-28platform/x86/intel/pmc: Add Lunar Lake M support to intel_pmc_core driverRajvi Jingar
Add Lunar Lake M support in intel_pmc_core driver Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-8-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-28platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driverRajvi Jingar
Add Arrow Lake S support in intel_pmc_core driver Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-7-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Add ssram_init flag in PMC discovery in Meteor LakeRajvi Jingar
If PMC discovery using pmc_core_ssram_init() was unsuccessful for the Meteor Lake platform, the legacy enumeration method is used. In this case pci device struct for the PMC SSRAM is not available and pmc_core_ssram_get_lpm_reqs() will not work. Add ssram_init flag to indicate if the PMC SSRAM initialization was successful or not. Call pmc_core_ssram_get_lpm_reqs() only if the ssram_init flag is set to true. Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-6-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Move common code to core.cRajvi Jingar
Functions like mtl_set_device_d3() and mtl_punit_pmt_init() were added for Meteor Lake. To be able to use them in Arrow Lake and future platforms, move them to core.c. Also, to support different guids, add guid argument in pmc_core_punit_pmt_init() and to support different PCI function numbers, add func arg in pmc_core_ssram_init(). Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-5-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Add PSON residency counter for Alder LakeRajvi Jingar
Add PSON register offsets for Alder Lake PCH that provides an access to PSON residency counter. Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-4-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Add regmap for Tiger Lake H PCHRajvi Jingar
Tiger Lake H PCH is same as Tiger Lake LP PCH from the driver perspective with the addition of the PSON residency counter. Add regmap for TGP H to add PSON register offsets for Tiger Lake H PCH. Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-3-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Add PSON residency counterRajvi Jingar
Tiger Lake platform onwards, devices have the capability to track the duration of time that their Power Supply Units (PSUs) are turned off during S0ix. This patch adds a debugfs file `pson_residency_usec` to provide access to this counter. Signed-off-by: Michael Bottini <michael.a.bottini@linux.intel.com> Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-2-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19platform/x86/intel/pmc: Fix in mtl_punit_pmt_init()Rajvi Jingar
pci_get_domain_bus_and_slot() increases the reference count on the pci device that is used to register the endpoint. In case of failure in registration, decrease reference count using pci_dev_put(pcidev) before returning. Fixes: 6e7964855381 ("platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake") Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20231219042216.2592029-1-rajvi.jingar@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-18platform/x86/intel/pmc: Fix in pmc_core_ssram_get_pmc()Rajvi Jingar
Passing PMC_IDX_MAIN in pmc_core_pmc_add() adds only primary pmc to pmcdev. Use pmc_idx instead to add all available pmcs. Fixes: a01486dc4bb1 ("platform/x86/intel/pmc: Cleanup SSRAM discovery") Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231216011702.1976408-1-rajvi.jingar@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-18platform/x86/intel/pmc: Fix hang in pmc_core_send_ltr_ignore()Rajvi Jingar
For input value 0, PMC stays unassigned which causes crash while trying to access PMC for register read/write. Include LTR index 0 in pmc_index and ltr_index calculation. Fixes: 2bcef4529222 ("platform/x86:intel/pmc: Enable debugfs multiple PMC support") Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231216011650.1973941-1-rajvi.jingar@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-04platform/x86/intel/pmc: Show Die C6 counter on Meteor LakeDavid E. Box
Expose the Die C6 counter on Meteor Lake. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-21-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Add debug attribute for Die C6 counterDavid E. Box
Add a "die_c6_us_show" debugfs attribute. Reads the counter value using Intel Platform Monitoring Technology (PMT) driver API. This counter is useful for determining the idle residency of CPUs in the compute tile. Also adds a missing forward declaration for punit_ep which was declared in an earlier upstream commit but only used for the first time in this one. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-20-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-PXi Pardee
Add support to read the low power mode requirements for Meteor Lake M and Meteor Lake P. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-19-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Retrieve LPM information using Intel PMTXi Pardee
On supported platforms, the low power mode (LPM) requirements for entering each idle substate are described in Platform Monitoring Technology (PMT) telemetry entries. Provide a function for platform code to attempt to find and read the requirements from the telemetry entries. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-18-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Display LPM requirements for multiple PMCsRajvi Jingar
Update the substate_requirements attribute to display the requirements for all the PMCs on a package. Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-17-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Find and register PMC telemetry entriesDavid E. Box
The PMC SSRAM device contains counters that are structured in Intel Platform Monitoring Technology (PMT) telemetry regions. Look for and register these telemetry regions from the driver so that they may be read using the Intel PMT ABI. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-16-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc/mtl: Use return value from pmc_core_ssram_init()David E. Box
Instead of checking for a NULL regbase, use the return value from pmc_core_ssram_init() to check if PMC discovery was successful. If not, use the legacy enumeration method (which only works for the primary PMC). Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-15-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Cleanup SSRAM discoveryDavid E. Box
Clean up the code handling SSRAM discovery. Handle all resource allocation and cleanup in pmc_core_ssram_get_pmc(). Return the error status from this function but only fail the init if we fail to discover the primary PMC. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-14-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86/intel/pmc: Allow pmc_core_ssram_init to failDavid E. Box
Currently, if the PMC SSRAM initialization fails, no error is returned and the only indication is that a PMC device has not been created. Instead, allow an error to be returned and handled directly by the caller. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-13-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform initXi Pardee
In order to setup a table of low power mode requirements for Meteor Lake, pmc_core_get_low_power_modes() will need to be run from platform init code so that the enabled modes are known, allowing the use of the pmc_for_each_mode helper. Make the function global and call it from the platform init code. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231129222132.2331261-12-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-09x86/cpu: Fix Gracemont uarchPeter Zijlstra
Alderlake N is an E-core only product using Gracemont micro-architecture. It fits the pre-existing naming scheme perfectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-M PMC related mapsXi Pardee
Add device ID and register maps for the PMC in IO expansion die M in Meteor Lake. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230613225347.2720665-9-rajvi.jingar@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-P PMC related mapsXi Pardee
Add device ID and register maps for the PMC in IO expansion die P in Meteor Lake. Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230613225347.2720665-8-rajvi.jingar@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit (git 2.34.1) at 2025-07-24 23:15:46 +0000