diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2015-07-13 11:21:11 +0100 |
|---|---|---|
| committer | Achin Gupta <achin.gupta@arm.com> | 2015-08-13 23:48:06 +0100 |
| commit | 85a181ce3878187ba684f28b3c93cc098bc971fc (patch) | |
| tree | df517eb231d57f0135d2433a014b93916d4e359b /bl31 | |
| parent | 5c8babcd70149db57734a38be432fe6625f3888f (diff) | |
PSCI: Migrate TF to the new platform API and CM helpers
This patch migrates the rest of Trusted Firmware excluding Secure Payload and
the dispatchers to the new platform and context management API. The per-cpu
data framework APIs which took MPIDRs as their arguments are deleted and only
the ones which take core index as parameter are retained.
Change-Id: I839d05ad995df34d2163a1cfed6baa768a5a595d
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/aarch64/cpu_data.S | 31 | ||||
| -rw-r--r-- | bl31/bl31_main.c | 4 |
2 files changed, 8 insertions, 27 deletions
diff --git a/bl31/aarch64/cpu_data.S b/bl31/aarch64/cpu_data.S index a53bd6d5..0842825c 100644 --- a/bl31/aarch64/cpu_data.S +++ b/bl31/aarch64/cpu_data.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -32,7 +32,6 @@ #include <cpu_data.h> .globl init_cpu_data_ptr -.globl _cpu_data_by_mpidr .globl _cpu_data_by_index /* ----------------------------------------------------------------- @@ -41,37 +40,19 @@ * Initialise the TPIDR_EL3 register to refer to the cpu_data_t * for the calling CPU. This must be called before cm_get_cpu_data() * - * This can be called without a valid stack. - * clobbers: x0, x1, x9, x10 + * This can be called without a valid stack. It assumes that + * plat_my_core_pos() does not clobber register x10. + * clobbers: x0, x1, x10 * ----------------------------------------------------------------- */ func init_cpu_data_ptr mov x10, x30 - mrs x0, mpidr_el1 - bl _cpu_data_by_mpidr + bl plat_my_core_pos + bl _cpu_data_by_index msr tpidr_el3, x0 ret x10 endfunc init_cpu_data_ptr - -/* ----------------------------------------------------------------- - * cpu_data_t *_cpu_data_by_mpidr(uint64_t mpidr) - * - * Return the cpu_data structure for the CPU with given MPIDR - * - * This can be called without a valid stack. It assumes that - * platform_get_core_pos() does not clobber register x9. - * clobbers: x0, x1, x9 - * ----------------------------------------------------------------- - */ -func _cpu_data_by_mpidr - mov x9, x30 - bl platform_get_core_pos - mov x30, x9 - b _cpu_data_by_index -endfunc _cpu_data_by_mpidr - - /* ----------------------------------------------------------------- * cpu_data_t *_cpu_data_by_index(uint32_t cpu_index) * diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index 19f37743..a1a37105 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -155,7 +155,7 @@ void bl31_prepare_next_image_entry(void) INFO("BL3-1: Next image address = 0x%llx\n", (unsigned long long) next_image_info->pc); INFO("BL3-1: Next image spsr = 0x%x\n", next_image_info->spsr); - cm_init_context(read_mpidr_el1(), next_image_info); + cm_init_my_context(next_image_info); cm_prepare_el3_exit(image_type); } |