diff options
| author | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-06-02 12:38:12 +0100 |
|---|---|---|
| committer | Andrew Thoelke <andrew.thoelke@arm.com> | 2014-06-17 11:20:00 +0100 |
| commit | ee94cc6fa6dc11229a53c3b66d2ce3487bb3b08f (patch) | |
| tree | 2d6c57c937294183bd284706aca62d47aa3022f7 /bl31 | |
| parent | 5e910074245fa180cfbe70d3c8bceeff1eaa026e (diff) | |
Remove early_exceptions from BL3-1
The crash reporting support and early initialisation of the
cpu_data allow the runtime_exception vectors to be used from
the start in BL3-1, removing the need for the additional
early_exception vectors and 2KB of code from BL3-1.
Change-Id: I5f8997dabbaafd8935a7455910b7db174a25d871
Diffstat (limited to 'bl31')
| -rw-r--r-- | bl31/aarch64/bl31_entrypoint.S | 8 | ||||
| -rw-r--r-- | bl31/bl31.mk | 3 | ||||
| -rw-r--r-- | bl31/bl31_main.c | 12 |
3 files changed, 7 insertions, 16 deletions
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S index 2e7476a1..e4dfea43 100644 --- a/bl31/aarch64/bl31_entrypoint.S +++ b/bl31/aarch64/bl31_entrypoint.S @@ -72,11 +72,13 @@ func bl31_entrypoint isb /* --------------------------------------------- - * Set the exception vector to something sane. + * Set the exception vector and zero tpidr_el3 + * until the crash reporting is set up * --------------------------------------------- */ - adr x1, early_exceptions + adr x1, runtime_exceptions msr vbar_el3, x1 + msr tpidr_el3, xzr /* --------------------------------------------------------------------- * The initial state of the Architectural feature trap register @@ -134,10 +136,10 @@ func bl31_entrypoint * Initialise cpu_data and crash reporting * --------------------------------------------- */ - bl init_cpu_data_ptr #if CRASH_REPORTING bl init_crash_reporting #endif + bl init_cpu_data_ptr /* --------------------------------------------- * Use SP_EL0 for the C runtime stack. diff --git a/bl31/bl31.mk b/bl31/bl31.mk index 4602e411..5555c319 100644 --- a/bl31/bl31.mk +++ b/bl31/bl31.mk @@ -38,8 +38,7 @@ BL31_SOURCES += bl31/bl31_main.c \ bl31/aarch64/context.S \ bl31/aarch64/cpu_data.S \ bl31/aarch64/runtime_exceptions.S \ - bl31/aarch64/crash_reporting.S \ - common/aarch64/early_exceptions.S \ + bl31/aarch64/crash_reporting.S \ lib/aarch64/cpu_helpers.S \ lib/locks/bakery/bakery_lock.c \ lib/locks/exclusive/spinlock.S \ diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index 5bb11ba3..6f88e656 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -71,7 +71,6 @@ void bl31_lib_init() ******************************************************************************/ void bl31_main(void) { - /* Perform remaining generic architectural setup from EL3 */ bl31_arch_setup(); @@ -89,16 +88,7 @@ void bl31_main(void) /* Clean caches before re-entering normal world */ dcsw_op_all(DCCSW); - /* - * Use the more complex exception vectors now that context - * management is setup. SP_EL3 should point to a 'cpu_context' - * structure which has an exception stack allocated. The PSCI - * service should have set the context. - */ - assert(cm_get_context(NON_SECURE)); - cm_set_next_eret_context(NON_SECURE); - write_vbar_el3((uint64_t) runtime_exceptions); - isb(); + /* By default run the non-secure BL3-3 image next */ next_image_type = NON_SECURE; /* |