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| author | danh-arm <dan.handley@arm.com> | 2016-07-25 12:29:52 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2016-07-25 12:29:52 +0100 |
| commit | 3dd9835f8ab3c2e7f57ddc92505d6c800bbacd47 (patch) | |
| tree | cbecea4cf95d12d01493f2241e846b02dc536f8c /drivers | |
| parent | bc469a84b5541bc717bc04712df73f4001847215 (diff) | |
| parent | 738b1fd7c0628e9c6cc89e36629f27bde01559df (diff) | |
Merge pull request #667 from soby-mathew/sm/PSCI_lib
Introduce PSCI library
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/arm/ccn/ccn_private.h | 6 | ||||
| -rw-r--r-- | drivers/arm/gic/v3/gicv3_helpers.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/arm/ccn/ccn_private.h b/drivers/arm/ccn/ccn_private.h index fffa2ca9..a5a6146d 100644 --- a/drivers/arm/ccn/ccn_private.h +++ b/drivers/arm/ccn/ccn_private.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -104,7 +104,7 @@ typedef enum rn_types { #define WAIT_FOR_DOMAIN_CTRL_OP_COMPLETION(region_id, stat_reg_offset, \ op_reg_offset, rn_id_map) \ { \ - uint64_t status_reg; \ + unsigned long long status_reg; \ do { \ status_reg = ccn_reg_read((ccn_plat_desc->periphbase), \ (region_id), \ @@ -208,7 +208,7 @@ typedef enum rn_types { /* * Helper function to return number of set bits in bitmap */ -static inline unsigned int count_set_bits(uint64_t bitmap) +static inline unsigned int count_set_bits(unsigned long long bitmap) { unsigned int count = 0; diff --git a/drivers/arm/gic/v3/gicv3_helpers.c b/drivers/arm/gic/v3/gicv3_helpers.c index 07ae54c4..0a81c869 100644 --- a/drivers/arm/gic/v3/gicv3_helpers.c +++ b/drivers/arm/gic/v3/gicv3_helpers.c @@ -250,7 +250,7 @@ void gicv3_rdistif_base_addrs_probe(uintptr_t *rdistif_base_addrs, uintptr_t gicr_base, mpidr_hash_fn mpidr_to_core_pos) { - unsigned long mpidr; + u_register_t mpidr; unsigned int proc_num; unsigned long long typer_val; uintptr_t rdistif_base = gicr_base; @@ -320,7 +320,7 @@ void gicv3_secure_spis_configure(uintptr_t gicd_base, unsigned int int_grp) { unsigned int index, irq_num; - uint64_t gic_affinity_val; + unsigned long long gic_affinity_val; assert((int_grp == INTR_GROUP1S) || (int_grp == INTR_GROUP0)); /* If `num_ints` is not 0, ensure that `sec_intr_list` is not NULL */ |