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| author | Jens Wiklander <jens.wiklander@linaro.org> | 2014-09-04 10:23:27 +0200 |
|---|---|---|
| committer | Jens Wiklander <jens.wiklander@linaro.org> | 2014-09-16 11:39:32 -0700 |
| commit | ae213cee8c38af64ba82c1c9e94598d7efe46327 (patch) | |
| tree | 80454bb25c54a250164b7af2d23e7086615516d4 /include/lib/aarch64/arch.h | |
| parent | 087b67a62b0a98b486e5ac332d979a6e5490fe8a (diff) | |
Initialize SCTLR_EL1 based on MODE_RW bit
Initializes SCTLR_EL1 based on MODE_RW bit in SPSR for the entry
point. The RES1 bits for SCTLR_EL1 differs for Aarch64 and Aarch32
mode.
Diffstat (limited to 'include/lib/aarch64/arch.h')
| -rw-r--r-- | include/lib/aarch64/arch.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 40562607..e5b2bf8c 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -121,6 +121,10 @@ #define SCTLR_EL1_RES1 ((1 << 29) | (1 << 28) | (1 << 23) | (1 << 22) | \ (1 << 11)) +#define SCTLR_AARCH32_EL1_RES1 \ + ((1 << 23) | (1 << 22) | (1 << 11) | (1 << 4) | \ + (1 << 3)) + #define SCTLR_M_BIT (1 << 0) #define SCTLR_A_BIT (1 << 1) #define SCTLR_C_BIT (1 << 2) |