diff options
| author | dp-arm <dimitris.papastamos@arm.com> | 2017-05-23 09:32:49 +0100 |
|---|---|---|
| committer | Dimitris Papastamos <dimitris.papastamos@arm.com> | 2017-06-22 10:33:19 +0100 |
| commit | d832aee900a92d14a08a6a2a552894188404b6a4 (patch) | |
| tree | f1e12914f0bc1f687509f1b7fbbaf172a335acfd /include/lib/aarch64/arch.h | |
| parent | 18f2efd67d881fe0a9a535ce9e801e60d746e024 (diff) | |
aarch64: Enable Statistical Profiling Extensions for lower ELs
SPE is only supported in non-secure state. Accesses to SPE specific
registers from SEL1 will trap to EL3. During a world switch, before
`TTBR` is modified the SPE profiling buffers are drained. This is to
avoid a potential invalid memory access in SEL1.
SPE is architecturally specified only for AArch64.
Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Diffstat (limited to 'include/lib/aarch64/arch.h')
| -rw-r--r-- | include/lib/aarch64/arch.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 990c1692..7bceea77 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -110,6 +110,11 @@ #define ID_AA64PFR0_EL3_SHIFT U(12) #define ID_AA64PFR0_ELX_MASK U(0xf) +/* ID_AA64DFR0_EL1.PMS definitions (for ARMv8.2+) */ +#define ID_AA64DFR0_PMS_SHIFT U(32) +#define ID_AA64DFR0_PMS_LENGTH U(4) +#define ID_AA64DFR0_PMS_MASK U(0xf) + #define EL_IMPL_NONE U(0) #define EL_IMPL_A64ONLY U(1) #define EL_IMPL_A64_A32 U(2) @@ -189,6 +194,8 @@ #define MDCR_SPD32_DISABLE U(0x2) #define MDCR_SPD32_ENABLE U(0x3) #define MDCR_SDD_BIT (U(1) << 16) +#define MDCR_NSPB(x) ((x) << 12) +#define MDCR_NSPB_EL1 U(0x3) #define MDCR_TDOSA_BIT (U(1) << 10) #define MDCR_TDA_BIT (U(1) << 9) #define MDCR_TPM_BIT (U(1) << 6) @@ -199,6 +206,9 @@ #endif /* MDCR_EL2 definitions */ +#define MDCR_EL2_TPMS (U(1) << 14) +#define MDCR_EL2_E2PB(x) ((x) << 12) +#define MDCR_EL2_E2PB_EL1 U(0x3) #define MDCR_EL2_TDRA_BIT (U(1) << 11) #define MDCR_EL2_TDOSA_BIT (U(1) << 10) #define MDCR_EL2_TDA_BIT (U(1) << 9) |