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authorNaga Sureshkumar Relli <nagasure@xilinx.com>2016-07-01 12:52:41 +0530
committerSoren Brinkmann <soren.brinkmann@xilinx.com>2016-07-12 08:05:10 -0700
commit84629f2f2cf73b6d6180fc8a234f1ea9d423b280 (patch)
treeb5954e86836a4a2ec51a0840c2e244740bb70c71 /lib
parent6f511c4782f079c75928a4dae3a4e3e4f6754831 (diff)
bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on error for applicable CPUs. These registers hold the ECC errors on L1 and L2 caches. This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/cpus/aarch64/cortex_a53.S4
-rw-r--r--lib/cpus/aarch64/cortex_a57.S4
-rw-r--r--lib/cpus/aarch64/cortex_a72.S4
-rw-r--r--lib/cpus/aarch64/cortex_a73.S3
4 files changed, 11 insertions, 4 deletions
diff --git a/lib/cpus/aarch64/cortex_a53.S b/lib/cpus/aarch64/cortex_a53.S
index bb565162..ed546e7e 100644
--- a/lib/cpus/aarch64/cortex_a53.S
+++ b/lib/cpus/aarch64/cortex_a53.S
@@ -234,11 +234,13 @@ endfunc cortex_a53_cluster_pwr_dwn
*/
.section .rodata.cortex_a53_regs, "aS"
cortex_a53_regs: /* The ascii list of register names to be reported */
- .asciz "cpuectlr_el1", ""
+ .asciz "cpuectlr_el1", "cpumerrsr_el1", "l2merrsr_el1", ""
func cortex_a53_cpu_reg_dump
adr x6, cortex_a53_regs
mrs x8, CPUECTLR_EL1
+ mrs x9, CPUMERRSR_EL1
+ mrs x10, L2MERRSR_EL1
ret
endfunc cortex_a53_cpu_reg_dump
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S
index 60929a05..d6b181d0 100644
--- a/lib/cpus/aarch64/cortex_a57.S
+++ b/lib/cpus/aarch64/cortex_a57.S
@@ -477,11 +477,13 @@ endfunc cortex_a57_cluster_pwr_dwn
*/
.section .rodata.cortex_a57_regs, "aS"
cortex_a57_regs: /* The ascii list of register names to be reported */
- .asciz "cpuectlr_el1", ""
+ .asciz "cpuectlr_el1", "cpumerrsr_el1", "l2merrsr_el1", ""
func cortex_a57_cpu_reg_dump
adr x6, cortex_a57_regs
mrs x8, CPUECTLR_EL1
+ mrs x9, CPUMERRSR_EL1
+ mrs x10, L2MERRSR_EL1
ret
endfunc cortex_a57_cpu_reg_dump
diff --git a/lib/cpus/aarch64/cortex_a72.S b/lib/cpus/aarch64/cortex_a72.S
index eb37f2ca..9f04fb72 100644
--- a/lib/cpus/aarch64/cortex_a72.S
+++ b/lib/cpus/aarch64/cortex_a72.S
@@ -231,11 +231,13 @@ endfunc cortex_a72_cluster_pwr_dwn
*/
.section .rodata.cortex_a72_regs, "aS"
cortex_a72_regs: /* The ascii list of register names to be reported */
- .asciz "cpuectlr_el1", ""
+ .asciz "cpuectlr_el1", "cpumerrsr_el1", "l2merrsr_el1", ""
func cortex_a72_cpu_reg_dump
adr x6, cortex_a72_regs
mrs x8, CPUECTLR_EL1
+ mrs x9, CPUMERRSR_EL1
+ mrs x10, L2MERRSR_EL1
ret
endfunc cortex_a72_cpu_reg_dump
diff --git a/lib/cpus/aarch64/cortex_a73.S b/lib/cpus/aarch64/cortex_a73.S
index 70b4c6a5..e1615dbd 100644
--- a/lib/cpus/aarch64/cortex_a73.S
+++ b/lib/cpus/aarch64/cortex_a73.S
@@ -144,11 +144,12 @@ endfunc cortex_a73_cluster_pwr_dwn
*/
.section .rodata.cortex_a73_regs, "aS"
cortex_a73_regs: /* The ascii list of register names to be reported */
- .asciz "cpuectlr_el1", ""
+ .asciz "cpuectlr_el1", "l2merrsr_el1", ""
func cortex_a73_cpu_reg_dump
adr x6, cortex_a73_regs
mrs x8, CORTEX_A73_CPUECTLR_EL1
+ mrs x9, CORTEX_A73_L2MERRSR_EL1
ret
endfunc cortex_a73_cpu_reg_dump