info: update viv_info tool with features from v5 kernel sources

Update the viv_info tool with features derived from the v5 kernel
sources, and adding support for reading the number of varyings from
the kernel.

Signed-off-by: Russell King <rmk@arm.linux.org.uk>

4 files changed, 109 insertions, 164 deletions

diff --git a/Makefile b/Makefile
index c0c2bb0..e4d7acb 100644
--- a/Makefile
+++ b/Makefile
@@ -41,7 +41,7 @@ clean:
 
 info/features.h: include/hw/common.xml.h
 	{ \
-	for n in chipFeatures chipMinorFeatures0 chipMinorFeatures1 chipMinorFeatures2 chipMinorFeatures3 chipMinorFeatures4; do \
+	for n in chipFeatures chipMinorFeatures0 chipMinorFeatures1 chipMinorFeatures2 chipMinorFeatures3 chipMinorFeatures4 chipMinorFeatures5; do \
 	echo "static struct feature vivante_$${n}[] __maybe_unused = {"; \
 	echo "#define FEATURE(x) { $${n}_##x, #x }"; \
 	sed -n "s/#define $${n}_\([^[:space:]]*\).*/\tFEATURE(\1),/p" $<; \
@@ -67,4 +67,4 @@ LDLIBS_viv_info		:=$(libdrm_ldflags)
 info/viv_info: info/viv_info.o
 
 CFLAGS_viv_info.o	:=$(libdrm_cflags)
-info/viv_info.o: info/viv_info.c info/features.h
+info/viv_info.o: info/viv_info.c info/features.h include/etnaviv_drm.h
diff --git a/include/etnaviv_drm.h b/include/etnaviv_drm.h
index 3f8b91e..f95e1c4 100644
--- a/include/etnaviv_drm.h
+++ b/include/etnaviv_drm.h
@@ -1,6 +1,5 @@
 /*
- * Copyright (C) 2013 Red Hat
- * Author: Rob Clark <robdclark@gmail.com>
+ * Copyright (C) 2015 Etnaviv Project
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 as published by
@@ -18,19 +17,11 @@
 #ifndef __ETNAVIV_DRM_H__
 #define __ETNAVIV_DRM_H__
 
-#define ETNAVIV_DATE_RMK		20130625
-#define ETNAVIV_DATE_PENGUTRONIX	20150302
-#define ETNAVIV_DATE_PENGUTRONIX2	20150910
-#define ETNAVIV_DATE_PENGUTRONIX3	20151126
-#define ETNAVIV_DATE_PENGUTRONIX4	20151214
-#define ETNAVIV_DATE			ETNAVIV_DATE_PENGUTRONIX
-
-#include <stddef.h>
 #include "drm.h"
 
 /* Please note that modifications to all structs defined here are
  * subject to backwards-compatibility constraints:
- *  1) Do not use pointers, use uint64_t instead for 32 bit / 64 bit
+ *  1) Do not use pointers, use __u64 instead for 32 bit / 64 bit
  *     user/kernel compatibility
  *  2) Keep fields aligned to their size
  *  3) Because of how drm_ioctl() works, we can add new fields at
@@ -41,23 +32,13 @@
  *     fields.. so that has to be somehow ok.
  */
 
-#define ETNADRM_PIPE_3D      0x00
-#define ETNADRM_PIPE_2D      0x01
-#define ETNADRM_PIPE_VG      0x02
-
-#if ETNAVIV_DATE == ETNAVIV_DATE_PENGUTRONIX
-#define ETNA_MAX_PIPES    4
-#else
-#define ETNA_MAX_PIPES    3
-#endif
-
 /* timeouts are specified in clock-monotonic absolute times (to simplify
  * restarting interrupted ioctls).  The following struct is logically the
  * same as 'struct timespec' but 32/64b ABI safe.
  */
 struct drm_etnaviv_timespec {
-	int64_t tv_sec;          /* seconds */
-	int64_t tv_nsec;         /* nanoseconds */
+	__s64 tv_sec;          /* seconds */
+	__s64 tv_nsec;         /* nanoseconds */
 };
 
 #define ETNAVIV_PARAM_GPU_MODEL                     0x01
@@ -67,6 +48,8 @@ struct drm_etnaviv_timespec {
 #define ETNAVIV_PARAM_GPU_FEATURES_2                0x05
 #define ETNAVIV_PARAM_GPU_FEATURES_3                0x06
 #define ETNAVIV_PARAM_GPU_FEATURES_4                0x07
+#define ETNAVIV_PARAM_GPU_FEATURES_5                0x08
+#define ETNAVIV_PARAM_GPU_FEATURES_6                0x09
 
 #define ETNAVIV_PARAM_GPU_STREAM_COUNT              0x10
 #define ETNAVIV_PARAM_GPU_REGISTER_MAX              0x11
@@ -78,40 +61,38 @@ struct drm_etnaviv_timespec {
 #define ETNAVIV_PARAM_GPU_BUFFER_SIZE               0x17
 #define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT         0x18
 #define ETNAVIV_PARAM_GPU_NUM_CONSTANTS             0x19
+#define ETNAVIV_PARAM_GPU_NUM_VARYINGS              0x1a
 
-//#define MSM_PARAM_GMEM_SIZE  0x02
+#define ETNA_MAX_PIPES 4
 
 struct drm_etnaviv_param {
-	uint32_t pipe;           /* in, ETNA_PIPE_x */
-	uint32_t param;          /* in, ETNAVIV_PARAM_x */
-	uint64_t value;          /* out (get_param) or in (set_param) */
+	__u32 pipe;           /* in */
+	__u32 param;          /* in, ETNAVIV_PARAM_x */
+	__u64 value;          /* out (get_param) or in (set_param) */
 };
 
 /*
  * GEM buffers:
  */
 
-#define ETNA_BO_CMDSTREAM    0x00000001
 #define ETNA_BO_CACHE_MASK   0x000f0000
 /* cache modes */
 #define ETNA_BO_CACHED       0x00010000
 #define ETNA_BO_WC           0x00020000
 #define ETNA_BO_UNCACHED     0x00040000
-#if ETNAVIV_DATE == ETNAVIV_DATE_PENGUTRONIX
 /* map flags */
 #define ETNA_BO_FORCE_MMU    0x00100000
-#endif
 
 struct drm_etnaviv_gem_new {
-	uint64_t size;           /* in */
-	uint32_t flags;          /* in, mask of ETNA_BO_x */
-	uint32_t handle;         /* out */
+	__u64 size;           /* in */
+	__u32 flags;          /* in, mask of ETNA_BO_x */
+	__u32 handle;         /* out */
 };
 
 struct drm_etnaviv_gem_info {
-	uint32_t handle;         /* in */
-	uint32_t pad;
-	uint64_t offset;         /* out, offset to pass to mmap() */
+	__u32 handle;         /* in */
+	__u32 pad;
+	__u64 offset;         /* out, offset to pass to mmap() */
 };
 
 #define ETNA_PREP_READ        0x01
@@ -119,13 +100,14 @@ struct drm_etnaviv_gem_info {
 #define ETNA_PREP_NOSYNC      0x04
 
 struct drm_etnaviv_gem_cpu_prep {
-	uint32_t handle;         /* in */
-	uint32_t op;             /* in, mask of ETNA_PREP_x */
+	__u32 handle;         /* in */
+	__u32 op;             /* in, mask of ETNA_PREP_x */
 	struct drm_etnaviv_timespec timeout;   /* in */
 };
 
 struct drm_etnaviv_gem_cpu_fini {
-	uint32_t handle;         /* in */
+	__u32 handle;         /* in */
+	__u32 flags;          /* in, placeholder for now, no defined values */
 };
 
 /*
@@ -133,71 +115,16 @@ struct drm_etnaviv_gem_cpu_fini {
  */
 
 /* The value written into the cmdstream is logically:
- *
- *   ((relocbuf->gpuaddr + reloc_offset) << shift) | or
- *
- * When we have GPU's w/ >32bit ptrs, it should be possible to deal
- * with this by emit'ing two reloc entries with appropriate shift
- * values.  Or a new ETNA_SUBMIT_CMD_x type would also be an option.
+ * relocbuf->gpuaddr + reloc_offset
  *
  * NOTE that reloc's must be sorted by order of increasing submit_offset,
  * otherwise EINVAL.
  */
-struct drm_etnaviv_gem_submit_reloc_r20151214 {
-	uint32_t submit_offset;  /* in, offset from submit_bo */
-	uint32_t reloc_idx;      /* in, index of reloc_bo buffer */
-	uint64_t reloc_offset;   /* in, offset from start of reloc_bo */
-	uint32_t flags;          /* in, placeholder for now */
-};
-
-struct drm_etnaviv_gem_submit_reloc_r20150302 {
-	uint32_t submit_offset;  /* in, offset from submit_bo */
-	uint32_t reloc_idx;      /* in, index of reloc_bo buffer */
-	uint64_t reloc_offset;   /* in, offset from start of reloc_bo */
-};
-
-/* Original API */
-struct drm_etnaviv_gem_submit_reloc_r20130625 {
-	uint32_t submit_offset;  /* in, offset from submit_bo */
-	uint32_t or;             /* in, value OR'd with result */
-	int32_t  shift;          /* in, amount of left shift (can be negative) */
-	uint32_t reloc_idx;      /* in, index of reloc_bo buffer */
-	uint64_t reloc_offset;   /* in, offset from start of reloc_bo */
-};
-
-/* submit-types:
- *   BUF - this cmd buffer is executed normally.
- *   IB_TARGET_BUF - this cmd buffer is an IB target.  Reloc's are
- *      processed normally, but the kernel does not setup an IB to
- *      this buffer in the first-level ringbuffer
- *   CTX_RESTORE_BUF - only executed if there has been a GPU context
- *      switch since the last SUBMIT ioctl
- */
-#define ETNA_SUBMIT_CMD_BUF             0x0001
-#if ETNAVIV_DATE == ETNAVIV_DATE_PENGUTRONIX
-#define ETNA_SUBMIT_CMD_CTX_RESTORE_BUF 0x0002
-#else
-#define ETNA_SUBMIT_CMD_IB_TARGET_BUF   0x0002
-#define ETNA_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
-#endif
-struct drm_etnaviv_gem_submit_cmd_r20150302 {
-	uint32_t type;           /* in, one of ETNA_SUBMIT_CMD_x */
-	uint32_t submit_idx;     /* in, index of submit_bo cmdstream buffer */
-	uint32_t submit_offset;  /* in, offset into submit_bo */
-	uint32_t size;           /* in, cmdstream size */
-	uint32_t pad;
-	uint32_t nr_relocs;      /* in, number of submit_reloc's */
-	uint64_t relocs;         /* in, ptr to array of submit_reloc's */
-};
-
-struct drm_etnaviv_gem_submit_cmd_r20130625 {
-	uint32_t type;           /* in, one of ETNA_SUBMIT_CMD_x */
-	uint32_t submit_idx;     /* in, index of submit_bo cmdstream buffer */
-	uint32_t submit_offset;  /* in, offset into submit_bo */
-	uint32_t size;           /* in, cmdstream size */
-	uint32_t pad;
-	uint32_t nr_relocs;      /* in, number of submit_reloc's */
-	uint64_t relocs;         /* in, ptr to array of submit_reloc's */
+struct drm_etnaviv_gem_submit_reloc {
+	__u32 submit_offset;  /* in, offset from submit_bo */
+	__u32 reloc_idx;      /* in, index of reloc_bo buffer */
+	__u64 reloc_offset;   /* in, offset from start of reloc_bo */
+	__u32 flags;          /* in, placeholder for now, no defined values */
 };
 
 /* Each buffer referenced elsewhere in the cmdstream submit (ie. the
@@ -214,46 +141,28 @@ struct drm_etnaviv_gem_submit_cmd_r20130625 {
 #define ETNA_SUBMIT_BO_READ             0x0001
 #define ETNA_SUBMIT_BO_WRITE            0x0002
 struct drm_etnaviv_gem_submit_bo {
-	uint32_t flags;          /* in, mask of ETNA_SUBMIT_BO_x */
-	uint32_t handle;         /* in, GEM handle */
-	uint64_t presumed;       /* in/out, presumed buffer address */
+	__u32 flags;          /* in, mask of ETNA_SUBMIT_BO_x */
+	__u32 handle;         /* in, GEM handle */
+	__u64 presumed;       /* in/out, presumed buffer address */
 };
 
 /* Each cmdstream submit consists of a table of buffers involved, and
  * one or more cmdstream buffers.  This allows for conditional execution
  * (context-restore), and IB buffers needed for per tile/bin draw cmds.
  */
-struct drm_etnaviv_gem_submit_r20150910 {
-	uint32_t fence;          /* out */
-	uint32_t pipe;           /* in, ETNA_PIPE_x */
-	uint32_t exec_state;     /* in, initial execution state (ETNA_PIPE_x) */
-	uint32_t nr_bos;         /* in, number of submit_bo's */
-	uint32_t nr_relocs;      /* in, number of submit_reloc's */
-	uint32_t stream_size;    /* in, cmdstream size */
-	uint64_t bos;            /* in, ptr to array of submit_bo's */
-	uint64_t relocs;         /* in, ptr to array of submit_reloc's */
-	uint64_t stream;         /* in, ptr to cmdstream */
-};
-
-struct drm_etnaviv_gem_submit_r20150302 {
-	uint32_t pipe;           /* in, ETNA_PIPE_x */
-	uint32_t exec_state;
-	uint32_t fence;          /* out */
-	uint32_t nr_bos;         /* in, number of submit_bo's */
-	uint32_t nr_cmds;        /* in, number of submit_cmd's */
-	uint32_t pad;
-	uint64_t bos;            /* in, ptr to array of submit_bo's */
-	uint64_t cmds;           /* in, ptr to array of submit_cmd's */
-};
-
-/* Original submission structure */
-struct drm_etnaviv_gem_submit_r20130625 {
-	uint32_t pipe;           /* in, ETNA_PIPE_x */
-	uint32_t fence;          /* out */
-	uint32_t nr_bos;         /* in, number of submit_bo's */
-	uint32_t nr_cmds;        /* in, number of submit_cmd's */
-	uint64_t bos;            /* in, ptr to array of submit_bo's */
-	uint64_t cmds;           /* in, ptr to array of submit_cmd's */
+#define ETNA_PIPE_3D      0x00
+#define ETNA_PIPE_2D      0x01
+#define ETNA_PIPE_VG      0x02
+struct drm_etnaviv_gem_submit {
+	__u32 fence;          /* out */
+	__u32 pipe;           /* in */
+	__u32 exec_state;     /* in, initial execution state (ETNA_PIPE_x) */
+	__u32 nr_bos;         /* in, number of submit_bo's */
+	__u32 nr_relocs;      /* in, number of submit_reloc's */
+	__u32 stream_size;    /* in, cmdstream size */
+	__u64 bos;            /* in, ptr to array of submit_bo's */
+	__u64 relocs;         /* in, ptr to array of submit_reloc's */
+	__u64 stream;         /* in, ptr to cmdstream */
 };
 
 /* The normal way to synchronize with the GPU is just to CPU_PREP on
@@ -263,14 +172,8 @@ struct drm_etnaviv_gem_submit_r20130625 {
  * mainly just exists as a way to implement the gallium pipe_fence
  * APIs without requiring a dummy bo to synchronize on.
  */
-struct drm_etnaviv_wait_fence_r20130625 {
-	uint32_t pipe;           /* in, ETNA_PIPE_x */
-	uint32_t fence;          /* in */
-	struct drm_etnaviv_timespec timeout;   /* in */
-};
-
 #define ETNA_WAIT_NONBLOCK      0x01
-struct drm_etnaviv_wait_fence_r20151126 {
+struct drm_etnaviv_wait_fence {
 	__u32 pipe;           /* in */
 	__u32 fence;          /* in */
 	__u32 flags;          /* in, mask of ETNA_WAIT_x */
@@ -278,22 +181,16 @@ struct drm_etnaviv_wait_fence_r20151126 {
 	struct drm_etnaviv_timespec timeout;   /* in */
 };
 
-#define ETNA_USERPTR_READ       0x01
-#define ETNA_USERPTR_WRITE      0x02
+#define ETNA_USERPTR_READ	0x01
+#define ETNA_USERPTR_WRITE	0x02
 struct drm_etnaviv_gem_userptr {
-	uint64_t user_ptr;	/* in, page aligned user pointer */
-	uint64_t user_size;	/* in, page aligned user size */
-	uint32_t flags; 	/* in, flags */
-	uint32_t handle;	/* out, non-zero handle */
+	__u64 user_ptr;	/* in, page aligned user pointer */
+	__u64 user_size;	/* in, page aligned user size */
+	__u32 flags;		/* in, flags */
+	__u32 handle;	/* out, non-zero handle */
 };
 
-struct drm_etnaviv_gem_wait_r20130625 {
-	__u32 pipe;				/* in */
-	__u32 handle;				/* in, bo to be waited for */
-	struct drm_etnaviv_timespec timeout;	/* in */
-};
-
-struct drm_etnaviv_gem_wait_r20151126 {
+struct drm_etnaviv_gem_wait {
 	__u32 pipe;				/* in */
 	__u32 handle;				/* in, bo to be waited for */
 	__u32 flags;				/* in, mask of ETNA_WAIT_x  */
@@ -302,7 +199,9 @@ struct drm_etnaviv_gem_wait_r20151126 {
 };
 
 #define DRM_ETNAVIV_GET_PARAM          0x00
+/* placeholder:
 #define DRM_ETNAVIV_SET_PARAM          0x01
+ */
 #define DRM_ETNAVIV_GEM_NEW            0x02
 #define DRM_ETNAVIV_GEM_INFO           0x03
 #define DRM_ETNAVIV_GEM_CPU_PREP       0x04
@@ -316,14 +215,11 @@ struct drm_etnaviv_gem_wait_r20151126 {
 #define DRM_IOCTL_ETNAVIV_GET_PARAM    DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GET_PARAM, struct drm_etnaviv_param)
 #define DRM_IOCTL_ETNAVIV_GEM_NEW      DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_NEW, struct drm_etnaviv_gem_new)
 #define DRM_IOCTL_ETNAVIV_GEM_INFO     DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_INFO, struct drm_etnaviv_gem_info)
-#define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_PREP, struct drm_etnaviv_gem_cpu_prep)
-#define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_FINI, struct drm_etnaviv_gem_cpu_fini)
+#define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_PREP, struct drm_etnaviv_gem_cpu_prep)
+#define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_FINI, struct drm_etnaviv_gem_cpu_fini)
 #define DRM_IOCTL_ETNAVIV_GEM_SUBMIT   DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_SUBMIT, struct drm_etnaviv_gem_submit)
-#define DRM_IOCTL_ETNAVIV_WAIT_FENCE   DRM_IOW (DRM_COMMAND_BASE + DRM_ETNAVIV_WAIT_FENCE, struct drm_etnaviv_wait_fence)
-#define DRM_IOCTL_ETNAVIV_GEM_WAIT     DRM_IOW (DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_WAIT, struct drm_etnaviv_gem_wait)
-
-#define __STR(x)			#x
-#define _STR(x)				__STR(x)
-#define ETNAVIV_DATE_STR		_STR(ETNAVIV_DATE)
+#define DRM_IOCTL_ETNAVIV_WAIT_FENCE   DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_WAIT_FENCE, struct drm_etnaviv_wait_fence)
+#define DRM_IOCTL_ETNAVIV_GEM_USERPTR  DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_USERPTR, struct drm_etnaviv_gem_userptr)
+#define DRM_IOCTL_ETNAVIV_GEM_WAIT     DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_WAIT, struct drm_etnaviv_gem_wait)
 
 #endif /* __ETNAVIV_DRM_H__ */
diff --git a/info/features.h b/info/features.h
index c1ef793..07b080a 100644
--- a/info/features.h
+++ b/info/features.h
@@ -214,3 +214,39 @@ static struct feature vivante_chipMinorFeatures4[] __maybe_unused = {
 	FEATURE(UNK31),
 #undef FEATURE
 };
+static struct feature vivante_chipMinorFeatures5[] __maybe_unused = {
+#define FEATURE(x) { chipMinorFeatures5_##x, #x }
+	FEATURE(UNK0),
+	FEATURE(UNK1),
+	FEATURE(UNK2),
+	FEATURE(UNK3),
+	FEATURE(UNK4),
+	FEATURE(UNK5),
+	FEATURE(UNK6),
+	FEATURE(UNK7),
+	FEATURE(UNK8),
+	FEATURE(HALTI3),
+	FEATURE(UNK10),
+	FEATURE(UNK11),
+	FEATURE(UNK12),
+	FEATURE(UNK13),
+	FEATURE(UNK14),
+	FEATURE(UNK15),
+	FEATURE(UNK16),
+	FEATURE(UNK17),
+	FEATURE(UNK18),
+	FEATURE(UNK19),
+	FEATURE(UNK20),
+	FEATURE(UNK21),
+	FEATURE(UNK22),
+	FEATURE(UNK23),
+	FEATURE(UNK24),
+	FEATURE(UNK25),
+	FEATURE(UNK26),
+	FEATURE(UNK27),
+	FEATURE(UNK28),
+	FEATURE(UNK29),
+	FEATURE(UNK30),
+	FEATURE(UNK31),
+#undef FEATURE
+};
diff --git a/info/viv_info.c b/info/viv_info.c
index 504ddd4..748a58d 100644
--- a/info/viv_info.c
+++ b/info/viv_info.c
@@ -83,6 +83,16 @@ static struct param params[] = {
 		.tbl = vivante_chipMinorFeatures3,
 		.tbl_sz = ARRAY_SIZE(vivante_chipMinorFeatures3),
 	}, {
+		.param = ETNAVIV_PARAM_GPU_FEATURES_5,
+		.format = "Chip minor features 4: 0x%08x\n",
+		.tbl = vivante_chipMinorFeatures4,
+		.tbl_sz = ARRAY_SIZE(vivante_chipMinorFeatures4),
+	}, {
+		.param = ETNAVIV_PARAM_GPU_FEATURES_6,
+		.format = "Chip minor features 5: 0x%08x\n",
+		.tbl = vivante_chipMinorFeatures5,
+		.tbl_sz = ARRAY_SIZE(vivante_chipMinorFeatures5),
+	}, {
 		.param = ETNAVIV_PARAM_GPU_STREAM_COUNT,
 		.format = "Stream count: %u\n",
 	}, {
@@ -112,6 +122,9 @@ static struct param params[] = {
 	}, {
 		.param = ETNAVIV_PARAM_GPU_BUFFER_SIZE,
 		.format = "Buffer size: %u\n",
+	}, {
+		.param = ETNAVIV_PARAM_GPU_NUM_VARYINGS,
+		.format = "Varyings count: %u\n",
 	},
 };