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author | Wladimir J. van der Laan <laanwj@gmail.com> | 2013-08-23 16:24:20 +0200 |
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committer | Wladimir J. van der Laan <laanwj@gmail.com> | 2013-08-23 16:24:20 +0200 |
commit | d9dcbafc88dd396d1e7e3b84c9ed37b4afdbc1aa (patch) | |
tree | a0897f27458a1e62f40c8d72d28191c1b6fef95f /doc | |
parent | 0542a88a3173b0d081cf9b6662dc23a38efcbec7 (diff) |
driver: zero-initialize TS memory
It is important to initialize the TS to zero, as random pattern
can result in crashes. Do this on the CPU as this only happens once
per surface anyway and it's a small area, so it may not be worth
queuing this to the GPU.
Diffstat (limited to 'doc')
-rw-r--r-- | doc/hardware.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/doc/hardware.md b/doc/hardware.md index 54a6b94..b36ce9a 100644 --- a/doc/hardware.md +++ b/doc/hardware.md @@ -237,6 +237,10 @@ The tile status bits are cleared using RS, by clearing a small surface with the 0x55555555. When clearing, only the destination address and stride needs to be set, the source is ignored. +An invalid pattern in the tile status memory can result in hangs when rendering. This was discovered +in tests that used a depth surface but did not clear it. The residual data in the TS are caused +the GPU to hang mysteriously on rendering. + Shader ISA ================ |