diff options
author | Wladimir J. van der Laan <laanwj@gmail.com> | 2013-07-25 18:18:19 +0200 |
---|---|---|
committer | Wladimir J. van der Laan <laanwj@gmail.com> | 2013-07-25 19:32:50 +0200 |
commit | 47617a78fb56e24d72fac5524ab2cc08f587ee3f (patch) | |
tree | fb532b242d59f9a795a4b9e4cfe050d28912c75d /rnndb | |
parent | 8d30abbefa615a4f64ac318c8cb887df62ef4b65 (diff) |
rnndb: add DMA debug register description
Info from imx6_v4_0_0 driver
Diffstat (limited to 'rnndb')
-rw-r--r-- | rnndb/state.xml | 67 | ||||
-rw-r--r-- | rnndb/state_hi.xml | 4 |
2 files changed, 61 insertions, 10 deletions
diff --git a/rnndb/state.xml b/rnndb/state.xml index e268dea..f5c950c 100644 --- a/rnndb/state.xml +++ b/rnndb/state.xml @@ -129,19 +129,68 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <bitfield pos="16" name="ENABLE" brief="Enable the command parser"/> </reg32> <reg32 offset="0x0065C" name="DMA_STATUS"/> - <reg32 offset="0x00660" name="DMA_DEBUG_STATE"> - <bitfield high="4" low="0" name="CMD_STATE"/> - <bitfield high="9" low="8" name="CMD_DMA_STATE"/> - <bitfield high="11" low="10" name="CMD_FETCH_STATE"/> - <bitfield high="13" low="12" name="REQ_DMA_STATE"/> - <bitfield high="15" low="14" name="CAL_STATE"/> - <bitfield high="17" low="16" name="VE_REQ_STATE"/> + <reg32 offset="0x00660" name="DMA_DEBUG_STATE" brief="DMA debug status"> + <bitfield high="4" low="0" name="CMD_STATE" brief="Command state"> + <value value="0" name="IDLE"/> + <value value="1" name="DEC"/> + <value value="2" name="ADR0"/> + <value value="3" name="LOAD0"/> + <value value="4" name="ADR1"/> + <value value="5" name="LOAD1"/> + <value value="6" name="3DADR"/> + <value value="7" name="3DCMD"/> + <value value="8" name="3DCNTL"/> + <value value="9" name="3DIDXCNTL"/> + <value value="10" name="INITREQDMA"/> + <value value="11" name="DRAWIDX"/> + <value value="12" name="DRAW"/> + <value value="13" name="2DRECT0"/> + <value value="14" name="2DRECT1"/> + <value value="15" name="2DDATA0"/> + <value value="16" name="2DDATA1"/> + <value value="17" name="WAITFIFO"/> + <value value="18" name="WAIT"/> + <value value="19" name="LINK"/> + <value value="20" name="END"/> + <value value="21" name="STALL"/> + </bitfield> + <bitfield high="9" low="8" name="CMD_DMA_STATE" brief="Command DMA state"> + <value value="0" name="IDLE"/> + <value value="1" name="START"/> + <value value="2" name="REQ"/> + <value value="3" name="END"/> + </bitfield> + <bitfield high="11" low="10" name="CMD_FETCH_STATE" brief="Command fetch state"> + <value value="0" name="IDLE"/> + <value value="1" name="RAMVALID"/> + <value value="2" name="VALID"/> + </bitfield> + <bitfield high="13" low="12" name="REQ_DMA_STATE" brief="DMA request state"> + <value value="0" name="IDLE"/> + <value value="1" name="WAITIDX"/> + <value value="2" name="CAL"/> + </bitfield> + <bitfield high="15" low="14" name="CAL_STATE" brief="Cal state"> + <value value="0" name="IDLE"/> + <value value="1" name="LDADR"/> + <value value="2" name="IDXCALC"/> + </bitfield> + <bitfield high="17" low="16" name="VE_REQ_STATE" brief="VE request state"> + <value value="0" name="IDLE"/> + <value value="1" name="CKCACHE"/> + <value value="2" name="MISS"/> + </bitfield> </reg32> <reg32 offset="0x00664" name="DMA_ADDRESS" brief="The current command decoder address (r/o)"> <doc>This is useful for debugging a stuck command queue.</doc> </reg32> - <reg32 offset="0x00668" name="DMA_LOW"/> - <reg32 offset="0x0066C" name="DMA_HIGH"/> + <reg32 offset="0x00668" name="DMA_LOW" brief="FE fetched word 0"> + <doc> + The GPU's DMA engine fetches 64-bit words at once. This register will read the lower + 32 bits (word 0) of the last-fetched DMA word. + </doc> + </reg32> + <reg32 offset="0x0066C" name="DMA_HIGH" brief="FE fetched word 1"/> <reg32 offset="0x00670" name="AUTO_FLUSH" value="0x00000000" brief="Auto flush cycles"/> <reg32 offset="0x00678" name="UNK00678" value="0x00000000"/> <reg32 offset="0x0067C" name="UNK0067C" value="0xFFFFFFFF"/> diff --git a/rnndb/state_hi.xml b/rnndb/state_hi.xml index 3e232cb..2b911ce 100644 --- a/rnndb/state_hi.xml +++ b/rnndb/state_hi.xml @@ -47,6 +47,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <bitfield high="17" low="17" name="IDLE_2D"/> <bitfield high="18" low="18" name="IDLE_VG"/> <bitfield high="19" low="19" name="ISOLATE_GPU"/> + <bitfield high="23" low="20" name="DEBUG_PIXEL_PIPE"/> </reg32> <reg32 offset="0x00004" name="IDLE_STATE" brief="Idle state"> <doc>Bits are 1 if the module is idle, 0 otherwise.</doc> @@ -175,7 +176,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <reg32 offset="0x00428" name="MEMORY_BASE_ADDR_PE"/> <reg32 offset="0x0042C" name="MEMORY_TIMING_CONTROL"/> <reg32 offset="0x00430" name="MEMORY_FLUSH"/> - <reg32 offset="0x00438" name="PROFILE_CYCLE_COUNTER"/> + <reg32 offset="0x00438" name="PROFILE_CYCLE_COUNTER" brief="Cycles counter"/> <reg32 offset="0x0043C" name="DEBUG_READ0"/> <reg32 offset="0x00440" name="DEBUG_READ1"/> <reg32 offset="0x00444" name="DEBUG_WRITE"/> @@ -254,6 +255,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> <value value="1" name="TOTAL_TRILINEAR_REQUESTS"/> <value value="2" name="TOTAL_DISCARDED_TEXTURE_REQUESTS"/> <value value="3" name="TOTAL_TEXTURE_REQUESTS"/> + <value value="4" name="UNKNOWN"/> <value value="5" name="MEM_READ_COUNT"/> <value value="6" name="MEM_READ_IN_8B_COUNT"/> <value value="7" name="CACHE_MISS_COUNT"/> |