rnndb: add base context states for vg

Add xml file with basic context registers; no register
meanings figured out yet.

3 files changed, 132 insertions, 17 deletions

diff --git a/rnndb/state.xml b/rnndb/state.xml
index 1d84a50..4e5e313 100644
--- a/rnndb/state.xml
+++ b/rnndb/state.xml
@@ -61,11 +61,11 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 <import file="state_hi.xml"/>
 <import file="state_2d.xml"/>
 <import file="state_3d.xml"/>
+<import file="state_vg.xml"/>
 
 <domain name="VIVS" brief="GPU state">
 
     <!-- Other generic enums -->
-
     <enum name="VARYING_COMPONENT_USE">
         <value value="0" name="UNUSED" brief="Component is not used"/>
         <value value="1" name="USED" brief="Component is used"/>
@@ -307,8 +307,6 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
         </reg32>
     </stripe>
 
-    <!-- VG states 0x02800 - 0x02A00 -->
-
     <stripe name="DUMMY" brief="/dev/null">
         <doc>Dummy state write, sometimes used for inserting padding or small delays into the command stream.</doc>
         <reg32 offset="0x3FFFC" name="DUMMY"/>
diff --git a/rnndb/state_2d.xml b/rnndb/state_2d.xml
index a327055..efcc998 100644
--- a/rnndb/state_2d.xml
+++ b/rnndb/state_2d.xml
@@ -21,14 +21,20 @@
  DEALINGS IN THE SOFTWARE.
 -->
 <!-- Vivante GCxxxx render states and registers overview:
-     PIPE_2D states, mostly taken from gcreg.h in gcx project
+     2D engine states, mostly taken from gcreg.h in gcx project.
+
+     Be sure to set the PIPE to PIPE_2D (on a core with the respective
+     capability) before programming any of these or using the DRAW_DE
+     command.
   -->
 <database xmlns="http://nouveau.freedesktop.org/"
 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
 xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 
 <domain name="VIVS" brief="GPU state">
-    <enum name="DE_FORMAT" brief="2D pixel format"> <!-- 0..7 match RS_FORMAT -->
+<!-- Enumerations for use in the 2D engine -->
+    <enum name="DE_FORMAT" brief="2D pixel format"> <!-- 0..7 match RS_FORMAT in 3D engine -->
+        <doc>Pixel formats that can be used as source or destination for the 2D engine.</doc>
         <value value="0" name="X4R4G4B4"/>
         <value value="1" name="A4R4G4B4"/>
         <value value="2" name="X1R5G5B5"/>
@@ -36,17 +42,21 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
         <value value="4" name="R5G6B5"/>
         <value value="5" name="X8R8G8B8"/>
         <value value="6" name="A8R8G8B8"/>
-        <value value="7" name="YUY2"/>
-        <value value="8" name="UYVY"/>
-        <value value="9" name="INDEX8"/>
-        <value value="10" name="MONOCHROME"/>
-        <value value="15" name="YV12"/>
+        <value value="7" name="YUY2" brief="YUV 4:2:2 interleaved per four bytes, Y0 Cb Y1 Cr"/>
+        <value value="8" name="UYVY" brief="YUV 4:2:2 interleaved per four bytes, Cb Y0 Cr Y1"/>
+        <value value="9" name="INDEX8" brief="8-bit palette indexed"/>
+        <value value="10" name="MONOCHROME" brief="1 bit per pixel"/>
+        <value value="15" name="YV12" brief="YUV 4:2:0 8-bit Y plane and 8 bit 2x2 subsampled V and U planes"/>
         <value value="16" name="A8"/>
-        <value value="17" name="NV12"/>
-        <value value="18" name="NV16"/>
-        <value value="19" name="RG16"/>
+        <value value="17" name="NV12" brief="YUV 4:2:0 8-bit Y plane and interleaved U/V plane with 2x2 subsampling"/>
+        <value value="18" name="NV16" brief="YUV 4:2:2 8-bit Y plane and interleaved U/V plane with 2x1 subsampling"/>
+        <value value="19" name="RG16" brief="Bayer, RGRG..(odd line), GBGB..(even line), 8-bit samples"/>
     </enum>
     <enum name="DE_SWIZZLE" brief="2D swizzle">
+        <doc>
+        Unlike the shader engine, the 2D engine has no full swizzle capability.
+        Four predefined common swizzles are available.
+        </doc>
         <value value="0" name="ARGB"/>
         <value value="1" name="RGBA"/>
         <value value="2" name="ABGR"/>
@@ -98,7 +108,11 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
         <value value="1" name="USE_ENABLE"/>
         <value value="2" name="USE_DISABLE"/>
     </enum>
-    <!-- These register patterns are repeated many times -->
+
+<!-- These register patterns are used a few times,
+     once for single-source blits, once in the BLOCK4 block for multi-source blits
+     and once in the BLOCK8 block for multi-source blits.
+     -->
     <bitset name="2D_SRC_STRIDE" inline="yes" brief="Stride of the source surface in bytes">
         <doc>
             To calculate the stride multiply the surface width in pixels
@@ -288,7 +302,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
         </bitfield>
         <bitfield high="20" low="20" name="DST_DEMULTIPLY" type="ENABLE_DISABLE"/>
     </bitset>
-    <bitset name="2D_PE_TRANSPARENCY" inline="yes"> <!-- XXX support masking for multiple fields for one mask -->
+    <bitset name="2D_PE_TRANSPARENCY" inline="yes">
         <bitfield high="1" low="0" name="SOURCE" type="2D_TRANSPARENCY_KIND" brief="Source transparency mode"/>
         <bitfield high="5" low="4" name="PATTERN" type="2D_TRANSPARENCY_KIND" brief="Pattern transparency mode">
             <doc>KEY transparency mode is reserved.</doc>
@@ -323,6 +337,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
         <bitfield high="3" low="3" name="SUPER_TILED" type="ENABLE_DISABLE"/>
         <bitfield high="8" low="8" name="MINOR_TILED" type="ENABLE_DISABLE"/>
     </bitset>
+
     <stripe name="DE" brief="2D Drawing Engine">
         <doc>2D drawing engine: conversion, scaling, filtering, rotation, blending of 2D images.</doc>
         <reg32 offset="0x01200" name="SRC_ADDRESS" type="VIVM" brief="32-bit aligned base address of the source surface"/>
@@ -715,7 +730,10 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
             </doc>
         </reg32>
         <!-- Multi-source blend -->
-        <stripe name="BLOCK4">
+        <stripe name="BLOCK4" brief="Multi-source blit (up to 4)">
+            <doc>
+            These registers are used for multi-source blit when the capability 2D_MULTI_SOURCE_BLIT is available.
+            </doc>
             <reg32 offset="0x12800" name="SRC_ADDRESS" length="4" type="VIVM"/>
             <reg32 offset="0x12810" name="SRC_STRIDE" length="4" type="2D_SRC_STRIDE"/>
             <reg32 offset="0x12820" name="SRC_ROTATION_CONFIG" length="4" type="2D_SRC_ROTATION_CONFIG"/>
@@ -741,7 +759,10 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
             <reg32 offset="0x12960" name="SRC_EX_CONFIG" length="4" type="2D_SRC_EX_CONFIG"/>
             <reg32 offset="0x12970" name="SRC_EX_ADDRESS" length="4" type="VIVM"/>
         </stripe>
-        <stripe name="BLOCK8">
+        <stripe name="BLOCK8" brief="Multi-source blit extended (up to 8)">
+            <doc>
+            These registers are used for multi-source blit when the capability 2D_MULTI_SOURCE_BLIT_EX is available.
+            </doc>
             <reg32 offset="0x12A00" name="SRC_ADDRESS" length="8" type="VIVM"/>
             <reg32 offset="0x12A20" name="SRC_STRIDE" length="8" type="2D_SRC_STRIDE"/>
             <reg32 offset="0x12A40" name="SRC_ROTATION_CONFIG" length="8" type="2D_SRC_ROTATION_CONFIG"/>
diff --git a/rnndb/state_vg.xml b/rnndb/state_vg.xml
new file mode 100644
index 0000000..005afe6
--- /dev/null
+++ b/rnndb/state_vg.xml
@@ -0,0 +1,96 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Copyright (c) 2012-2013 The Etnaviv Project
+
+ Permission is hereby granted, free of charge, to any person obtaining a
+ copy of this software and associated documentation files (the "Software"),
+ to deal in the Software without restriction, including without limitation
+ the rights to use, copy, modify, merge, publish, distribute, sub license,
+ and/or sell copies of the Software, and to permit persons to whom the
+ Software is furnished to do so, subject to the following conditions:
+
+ The above copyright notice and this permission notice (including the
+ next paragraph) shall be included in all copies or substantial portions
+ of the Software.
+
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ DEALINGS IN THE SOFTWARE.
+-->
+<database xmlns="http://nouveau.freedesktop.org/"
+xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
+<!-- Vivante GCxxxx render states and registers overview:
+     OpenVG part (GC350)
+ -->
+<domain name="VIVS" brief="GPU state">
+    <stripe name="VG" brief="OpenVG state">
+        <reg32 offset="0x02800" name="UNK02800" value="0x00000000"/>
+        <reg32 offset="0x02804" name="UNK02804" value="0x00000000"/>
+        <reg32 offset="0x02808" name="UNK02808" value="0x00000000"/>
+        <reg32 offset="0x0280C" name="UNK0280C" value="0x00000000"/>
+        <reg32 offset="0x02810" name="UNK02810" value="0x00000000" length="2"/>
+        <reg32 offset="0x02818" name="UNK02818" value="0x00000000" length="2"/>
+        <reg32 offset="0x02820" name="UNK02820" value="0x00000000" length="2"/>
+        <reg32 offset="0x02828" name="UNK02828" value="0x00000000"/>
+        <reg32 offset="0x0282C" name="UNK0282C" value="0x00000000"/>
+        <reg32 offset="0x02830" name="UNK02830" value="0x00000000" length="4"/>
+        <reg32 offset="0x02840" name="UNK02840" value="0x00000000"/>
+        <reg32 offset="0x02844" name="UNK02844" value="0x00000000"/>
+        <reg32 offset="0x02848" name="UNK02848" value="0x00000000"/>
+        <reg32 offset="0x0284C" name="UNK0284C" value="0x00000000"/>
+        <reg32 offset="0x02850" name="UNK02850" value="0x00000000"/>
+        <reg32 offset="0x02854" name="UNK02854" value="0x00000000"/>
+        <reg32 offset="0x02858" name="UNK02858" value="0x00000000"/>
+        <reg32 offset="0x0285C" name="UNK0285C" value="0x00000000"/>
+        <reg32 offset="0x02860" name="UNK02860" value="0x00000000" length="3"/>
+        <reg32 offset="0x02870" name="UNK02870" value="0x00000000" length="3"/>
+        <reg32 offset="0x02880" name="UNK02880" value="0x00000000" length="3"/>
+        <reg32 offset="0x02890" name="UNK02890" value="0x00000000" length="2"/>
+        <reg32 offset="0x02898" name="UNK02898" value="0x00000000" length="2"/>
+        <reg32 offset="0x028A0" name="UNK028A0" value="0x00000000" length="2"/>
+        <reg32 offset="0x028A8" name="UNK028A8" value="0x00000000" length="2"/>
+        <reg32 offset="0x028B0" name="UNK028B0" value="0x00000000" length="2"/>
+        <reg32 offset="0x028B8" name="UNK028B8" value="0x00000000" length="2"/>
+        <reg32 offset="0x028C0" name="UNK028C0" value="0x00000000"/>
+        <reg32 offset="0x028C4" name="UNK028C4" value="0x00000000"/>
+        <reg32 offset="0x028C8" name="UNK028C8" value="0x00000000"/>
+        <reg32 offset="0x028CC" name="UNK028CC" value="0x00000000"/>
+        <reg32 offset="0x028D0" name="UNK028D0" value="0x00000000"/>
+        <reg32 offset="0x028D4" name="UNK028D4" value="0x00000000"/>
+        <reg32 offset="0x028D8" name="UNK028D8" value="0x00000000"/>
+        <reg32 offset="0x028DC" name="UNK028DC" value="0x00000000"/>
+        <reg32 offset="0x028E0" name="UNK028E0" value="0x00000000"/>
+        <reg32 offset="0x028E4" name="UNK028E4" value="0x00000000"/>
+        <reg32 offset="0x028E8" name="UNK028E8" value="0x00000000"/>
+        <reg32 offset="0x028EC" name="UNK028EC" value="0x00000000"/>
+        <reg32 offset="0x028F0" name="UNK028F0" value="0x00000000"/>
+        <reg32 offset="0x028F8" name="UNK028F8" value="0x00000055"/>
+        <reg32 offset="0x028FC" name="UNK028FC" value="0x70707074"/>
+        <reg32 offset="0x02900" name="UNK02900" value="0x00000000" length="6"/>
+        <reg32 offset="0x02918" name="UNK02918" value="0x75057545"/>
+        <reg32 offset="0x0291C" name="UNK0291C" value="0x70007000"/>
+        <reg32 offset="0x02920" name="UNK02920" value="0x70707074"/>
+        <reg32 offset="0x02924" name="UNK02924" value="0x74007000"/>
+        <reg32 offset="0x02928" name="UNK02928" value="0x70007000"/>
+        <reg32 offset="0x0292C" name="UNK0292C" value="0x70007000"/>
+        <reg32 offset="0x02930" name="UNK02930" value="0x70007000"/>
+        <reg32 offset="0x02934" name="UNK02934" value="0x00402008"/>
+        <reg32 offset="0x02938" name="UNK02938" value="0x04001000"/>
+        <reg32 offset="0x0293C" name="UNK0293C" value="0x00800200"/>
+        <reg32 offset="0x02940" name="UNK02940" value="0x00000000" length="2"/>
+        <reg32 offset="0x02948" name="UNK02948" value="0x00000000" length="2"/>
+        <reg32 offset="0x02950" name="UNK02950" value="0x00000000"/>
+        <reg32 offset="0x02954" name="UNK02954" value="0x00000000"/>
+        <reg32 offset="0x02958" name="UNK02958" value="0x00000000"/>
+        <reg32 offset="0x0295C" name="UNK0295C" value="0x00000000"/>
+        <reg32 offset="0x02960" name="UNK02960" value="0x00000000"/>
+        <reg32 offset="0x02980" name="UNK02980" value="0x00000000" length="25"/>
+    </stripe>
+</domain>
+
+</database>
+