diff options
author | Christian Gmeiner <christian.gmeiner@gmail.com> | 2014-01-29 20:26:08 +0000 |
---|---|---|
committer | Christian Gmeiner <christian.gmeiner@gmail.com> | 2014-02-08 09:24:30 +0000 |
commit | 57a08413f36d8a0711cf25d01ae0a7eafea86361 (patch) | |
tree | 9e0dcc8c3f6624eb93574c1d46bd3a97b37a5297 /src | |
parent | b93d8f202e436a68010267a5529936fbbffb0db2 (diff) |
rs: only emit pipe addresses which are really used
excerpt from cmd buffer generated by binary blob:
0x08010581, /* LOAD_STATE (1) Base: 0x01604 Size: 1 Fixp: 0 */
0x20000686, /* [01604] RS.CONFIG := SOURCE_FORMAT=A8R8G8B8,DOWNSAMPLE_X=0,DOWNSAMPLE_Y=0,SOURCE_TILED=1,DEST_FORMAT=A8R8G8B8,DEST_TILED=0,SWAP_RB=1,FLIP=0 */
0x08010583, /* LOAD_STATE (1) Base: 0x0160C Size: 1 Fixp: 0 */
0xc0001c00, /* [0160C] RS.SOURCE_STRIDE := STRIDE=0x1c00,MULTI=1,TILING=1 */
0x08010585, /* LOAD_STATE (1) Base: 0x01614 Size: 1 Fixp: 0 */
0x00000700, /* [01614] RS.DEST_STRIDE := STRIDE=0x700,MULTI=0,TILING=0 */
0x0802058c, /* LOAD_STATE (1) Base: 0x01630 Size: 2 Fixp: 0 */
0xffffffff, /* [01630] RS.DITHER[0] := 0xffffffff */
0xffffffff, /* [01634] RS.DITHER[1] := 0xffffffff */
0x00000000, /* PAD */
0x0801058f, /* LOAD_STATE (1) Base: 0x0163C Size: 1 Fixp: 0 */
0x00000000, /* [0163C] RS.CLEAR_CONTROL := BITS=0x0,MODE=DISABLED */
0x080105a8, /* LOAD_STATE (1) Base: 0x016A0 Size: 1 Fixp: 0 */
0x00000000, /* [016A0] RS.EXTRA_CONFIG := AA=0x0,ENDIAN=NO_SWAP */
0x080205b0, /* LOAD_STATE (1) Base: 0x016C0 Size: 2 Fixp: 0 */
0x38910000, /* [016C0] RS.PIPE[0].SOURCE_ADDR := ADDR_I */
0x3894b000, /* [016C4] RS.PIPE[1].SOURCE_ADDR := ADDR_27 */
0x00000000, /* PAD */
0x080105b8, /* LOAD_STATE (1) Base: 0x016E0 Size: 1 Fixp: 0 */
0x38a37c00, /* [016E0] RS.PIPE[0].DEST_ADDR := ADDR_P */
0x08010588, /* LOAD_STATE (1) Base: 0x01620 Size: 1 Fixp: 0 */
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/etnaviv/etna_rs.c | 34 |
1 files changed, 25 insertions, 9 deletions
diff --git a/src/etnaviv/etna_rs.c b/src/etnaviv/etna_rs.c index f535e5e..dd6b1dc 100644 --- a/src/etnaviv/etna_rs.c +++ b/src/etnaviv/etna_rs.c @@ -136,21 +136,37 @@ void etna_submit_rs_state(struct etna_ctx *restrict ctx, const struct compiled_r } else if (ctx->conn->chip.pixel_pipes == 2) { - etna_reserve(ctx, 34); + etna_reserve(ctx, 34); /* worst case - both pipes multi=1 */ /*0 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_CONFIG>>2, 1, 0); /*1 */ ETNA_EMIT(ctx, cs->RS_CONFIG); /*2 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_SOURCE_STRIDE>>2, 1, 0); /*3 */ ETNA_EMIT(ctx, cs->RS_SOURCE_STRIDE); /*4 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_DEST_STRIDE>>2, 1, 0); /*5 */ ETNA_EMIT(ctx, cs->RS_DEST_STRIDE); - /*6 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_SOURCE_ADDR(0)>>2, 2, 0); - /*7 */ ETNA_EMIT(ctx, cs->RS_PIPE_SOURCE_ADDR[0]); - /*8 */ ETNA_EMIT(ctx, cs->RS_PIPE_SOURCE_ADDR[1]); - /*9 */ ETNA_EMIT(ctx, 0x00000000); /* pad */ - /*10*/ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_DEST_ADDR(0)>>2, 2, 0); - /*11*/ ETNA_EMIT(ctx, cs->RS_PIPE_DEST_ADDR[0]); - /*12*/ ETNA_EMIT(ctx, cs->RS_PIPE_DEST_ADDR[1]); - /*13*/ ETNA_EMIT(ctx, 0x00000000); /* pad */ + if (cs->RS_SOURCE_STRIDE & VIVS_RS_SOURCE_STRIDE_MULTI) + { + /*6 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_SOURCE_ADDR(0)>>2, 2, 0); + /*7 */ ETNA_EMIT(ctx, cs->RS_PIPE_SOURCE_ADDR[0]); + /*8 */ ETNA_EMIT(ctx, cs->RS_PIPE_SOURCE_ADDR[1]); + /*9 */ ETNA_EMIT(ctx, 0x00000000); /* pad */ + } + else + { + /*6 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_SOURCE_ADDR(0)>>2, 1, 0); + /*7 */ ETNA_EMIT(ctx, cs->RS_PIPE_SOURCE_ADDR[0]); + } + if (cs->RS_DEST_STRIDE & VIVS_RS_DEST_STRIDE_MULTI) + { + /*10*/ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_DEST_ADDR(0)>>2, 2, 0); + /*11*/ ETNA_EMIT(ctx, cs->RS_PIPE_DEST_ADDR[0]); + /*12*/ ETNA_EMIT(ctx, cs->RS_PIPE_DEST_ADDR[1]); + /*13*/ ETNA_EMIT(ctx, 0x00000000); /* pad */ + } + else + { + /*10 */ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_DEST_ADDR(0)>>2, 1, 0); + /*11 */ ETNA_EMIT(ctx, cs->RS_PIPE_DEST_ADDR[0]); + } /*14*/ ETNA_EMIT_LOAD_STATE(ctx, VIVS_RS_PIPE_OFFSET(0)>>2, 2, 0); /*15*/ ETNA_EMIT(ctx, cs->RS_PIPE_OFFSET[0]); /*16*/ ETNA_EMIT(ctx, cs->RS_PIPE_OFFSET[1]); |