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/****************************************************************************
*
* Copyright (C) 2005 - 2012 by Vivante Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the license, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*****************************************************************************/
#ifndef __gc_hal_options_internal_h_
#define __gc_hal_options_internal_h_
#include "gc_hal.h"
/*
VIVANTE_NO_3D
This define disables support for 3D rendering.
*/
#ifndef VIVANTE_NO_3D
# define VIVANTE_NO_3D 0
#endif
/*
gcdPRINT_VERSION
Print HAL version.
*/
#ifndef gcdPRINT_VERSION
# define gcdPRINT_VERSION 0
#endif
/*
USE_NEW_LINUX_SIGNAL
This define enables the Linux kernel signaling between kernel and user.
*/
#ifndef USE_NEW_LINUX_SIGNAL
# define USE_NEW_LINUX_SIGNAL 0
#endif
/*
NO_USER_DIRECT_ACCESS_FROM_KERNEL
This define enables the Linux kernel behavior accessing user memory.
*/
#ifndef NO_USER_DIRECT_ACCESS_FROM_KERNEL
# define NO_USER_DIRECT_ACCESS_FROM_KERNEL 0
#endif
/*
PROFILE_HAL_COUNTERS
This define enables HAL counter profiling support. HW and SHADER
counter profiling depends on this.
*/
#ifndef PROFILE_HAL_COUNTERS
# define PROFILE_HAL_COUNTERS 1
#endif
/*
gcdDUMP
When set to 1, a dump of all states and memory uploads, as well as other
hardware related execution will be printed to the debug console. This
data can be used for playing back applications.
*/
#ifndef gcdDUMP
# define gcdDUMP 0
#endif
/*
gcdDUMP_API
When set to 1, a high level dump of the EGL and GL/VG APs's are
captured.
*/
#ifndef gcdDUMP_API
# define gcdDUMP_API 0
#endif
/*
gcdDUMP_FRAMERATE
When set to a value other than zero, averaqe frame rate will be dumped.
The value set is the starting frame that the average will be calculated.
This is needed because sometimes first few frames are too slow to be included
in the average. Frame count starts from 1.
*/
#ifndef gcdDUMP_FRAMERATE
# define gcdDUMP_FRAMERATE 0
#endif
/*
gcdDUMP_COMMAND
When set to non-zero, the command queue will dump all incoming command
and context buffers as well as all other modifications to the command
queue.
*/
#ifndef gcdDUMP_COMMAND
# define gcdDUMP_COMMAND 0
#endif
/*
gcdNULL_DRIVER
Set to 1 for infinite speed hardware.
Set to 2 for bypassing the HAL.
Set to 3 for bypassing the drivers.
*/
#ifndef gcdNULL_DRIVER
# define gcdNULL_DRIVER 0
#endif
/*
gcdCOMMAND_QUEUES
Number of command queues in the kernel.
*/
#ifndef gcdCOMMAND_QUEUES
# define gcdCOMMAND_QUEUES 2
#endif
/*
gcdPOWER_CONTROL_DELAY
The delay in milliseconds required to wait until the GPU has woke up
from a suspend or power-down state. This is system dependent because
the bus clock also needs to stabalize.
*/
#ifndef gcdPOWER_CONTROL_DELAY
# define gcdPOWER_CONTROL_DELAY 0
#endif
/*
gcdMMU_SIZE
Size of the MMU page table in bytes. Each 4 bytes can hold 4kB worth of
virtual data.
*/
#ifndef gcdMMU_SIZE
# define gcdMMU_SIZE (128 << 10)
#endif
/*
gcdSECURE_CACHE_SLOTS
Number of slots in the logical to DMA address cache table. Each time a
logical address needs to be translated into a DMA address for the GPU,
this cache will be walked. The replacement scheme is LRU.
*/
#ifndef gcdSECURE_CACHE_SLOTS
# define gcdSECURE_CACHE_SLOTS 1024
#endif
/*
gcdSECURE_CACHE_METHOD
Replacement scheme used for Secure Cache. The following options are
available:
gcdSECURE_CACHE_LRU
A standard LRU cache.
gcdSECURE_CACHE_LINEAR
A linear walker with the idea that an application will always
render the scene in a similar way, so the next entry in the
cache should be a hit most of the time.
gcdSECURE_CACHE_HASH
A 256-entry hash table.
gcdSECURE_CACHE_TABLE
A simple cache but with potential of a lot of cache replacement.
*/
#ifndef gcdSECURE_CACHE_METHOD
# define gcdSECURE_CACHE_METHOD gcdSECURE_CACHE_HASH
#endif
/*
gcdREGISTER_ACCESS_FROM_USER
Set to 1 to allow IOCTL calls to get through from user land. This
should only be in debug or development drops.
*/
#ifndef gcdREGISTER_ACCESS_FROM_USER
# define gcdREGISTER_ACCESS_FROM_USER 1
#endif
/*
gcdPOWER_MANAGEMENT
This define enables the power management code.
*/
#ifndef gcdPOWER_MANAGEMENT
# define gcdPOWER_MANAGEMENT 1
#endif
/*
gcdGPU_TIMEOUT
This define specified the number of milliseconds the system will wait
before it broadcasts the GPU is stuck. In other words, it will define
the timeout of any operation that needs to wait for the GPU.
If the value is 0, no timeout will be checked for.
*/
#ifndef gcdGPU_TIMEOUT
# define gcdGPU_TIMEOUT (2000 * 5)
#endif
/*
gcdGPU_ADVANCETIMER
it is advance timer.
*/
#ifndef gcdGPU_ADVANCETIMER
# define gcdGPU_ADVANCETIMER 250
#endif
/*
gcdCMD_NO_2D_CONTEXT
This define enables no-context 2D command buffer.
*/
#ifndef gcdCMD_NO_2D_CONTEXT
# define gcdCMD_NO_2D_CONTEXT 1
#endif
/*
gcdENABLE_BANK_ALIGNMENT
When enabled, video memory is allocated bank aligned. The vendor can modify
_GetSurfaceBankAlignment() and gcoSURF_GetBankOffsetBytes() to define how
different types of allocations are bank and channel aligned.
When disabled (default), no bank alignment is done.
*/
#ifndef gcdENABLE_BANK_ALIGNMENT
# define gcdENABLE_BANK_ALIGNMENT 0
#endif
/*
gcdBANK_BIT_START
Specifies the start bit of the bank (inclusive).
*/
#ifndef gcdBANK_BIT_START
# define gcdBANK_BIT_START 12
#endif
/*
gcdBANK_BIT_END
Specifies the end bit of the bank (inclusive).
*/
#ifndef gcdBANK_BIT_END
# define gcdBANK_BIT_END 14
#endif
/*
gcdBANK_CHANNEL_BIT
When set, video memory when allocated bank aligned is allocated such that
render and depth buffer addresses alternate on the channel bit specified.
This option has an effect only when gcdENABLE_BANK_ALIGNMENT is enabled.
When disabled (default), no alteration is done.
*/
#ifndef gcdBANK_CHANNEL_BIT
# define gcdBANK_CHANNEL_BIT 7
#endif
/*
gcdDYNAMIC_SPEED
When non-zero, it informs the kernel driver to use the speed throttling
broadcasting functions to inform the system the GPU should be spet up or
slowed down. It will send a broadcast for slowdown each "interval"
specified by this define in milliseconds
(gckOS_BroadcastCalibrateSpeed).
*/
#ifndef gcdDYNAMIC_SPEED
# define gcdDYNAMIC_SPEED 2000
#endif
/*
gcdDYNAMIC_EVENT_THRESHOLD
When non-zero, it specifies the maximum number of available events at
which the kernel driver will issue a broadcast to speed up the GPU
(gckOS_BroadcastHurry).
*/
#ifndef gcdDYNAMIC_EVENT_THRESHOLD
# define gcdDYNAMIC_EVENT_THRESHOLD 5
#endif
/*
gcdENABLE_PROFILING
Enable profiling macros.
*/
#ifndef gcdENABLE_PROFILING
# define gcdENABLE_PROFILING 0
#endif
/*
gcdENABLE_128B_MERGE
Enable 128B merge for the BUS control.
*/
#ifndef gcdENABLE_128B_MERGE
# define gcdENABLE_128B_MERGE 0
#endif
/*
gcdFRAME_DB
When non-zero, it specified the number of frames inside the frame
database. The frame DB will collect per-frame timestamps and hardware
counters.
*/
#ifndef gcdFRAME_DB
# define gcdFRAME_DB 0
# define gcdFRAME_DB_RESET 0
#endif
/*
gcdPAGED_MEMORY_CACHEABLE
When non-zero, paged memory will be cacheable.
Normally, driver will detemines whether a video memory
is cacheable or not. When cacheable is not neccessary,
it will be writecombine.
This option is only for those SOC which can't enable
writecombine without enabling cacheable.
*/
#ifndef gcdPAGED_MEMORY_CACHEABLE
# define gcdPAGED_MEMORY_CACHEABLE 0
#endif
/*
gcdNONPAGED_MEMORY_CACHEABLE
When non-zero, non paged memory will be cacheable.
*/
#ifndef gcdNONPAGED_MEMORY_CACHEABLE
# define gcdNONPAGED_MEMORY_CACHEABLE 0
#endif
/*
gcdNONPAGED_MEMORY_BUFFERABLE
When non-zero, non paged memory will be bufferable.
gcdNONPAGED_MEMORY_BUFFERABLE and gcdNONPAGED_MEMORY_CACHEABLE
can't be set 1 at same time
*/
#ifndef gcdNONPAGED_MEMORY_BUFFERABLE
# define gcdNONPAGED_MEMORY_BUFFERABLE 1
#endif
/*
gcd6000_SUPPORT
Temporary define to enable/disable 6000 support.
*/
#ifndef gcd6000_SUPPORT
# define gcd6000_SUPPORT 0
#endif
/*
gcdPOWEROFF_TIMEOUT
When non-zero, GPU will power off automatically from
idle state, and gcdPOWEROFF_TIMEOUT is also the default
timeout in milliseconds.
*/
#ifndef gcdPOWEROFF_TIMEOUT
# define gcdPOWEROFF_TIMEOUT 300
#endif
/*
gcdUSE_VIDMEM_PER_PID
*/
#ifndef gcdUSE_VIDMEM_PER_PID
# define gcdUSE_VIDMEM_PER_PID 0
#endif
/*
gcdENABLE_RECOVERY
This define enables the recovery code.
*/
#ifndef gcdENABLE_RECOVERY
# define gcdENABLE_RECOVERY 1
#endif
/*
gcdENABLE_OUTER_CACHE_PATCH
Enable the outer cache patch.
*/
#ifndef gcdENABLE_OUTER_CACHE_PATCH
# define gcdENABLE_OUTER_CACHE_PATCH 0
#endif
#ifndef gcdSHARED_PAGETABLE
# define gcdSHARED_PAGETABLE 1
#endif
#ifndef gcdUSE_OPENCL
# define gcdUSE_OPENCL 0
#endif
/*
gcdSMALL_BLOCK_SIZE
When non-zero, a part of VIDMEM will be reserved for requests
whose requesting size is less than gcdSMALL_BLOCK_SIZE.
For Linux, it's the size of a page. If this requeset fallbacks
to gcvPOOL_CONTIGUOUS or gcvPOOL_VIRTUAL, memory will be wasted
because they allocate a page at least.
*/
#ifndef gcdSMALL_BLOCK_SIZE
# define gcdSMALL_BLOCK_SIZE 4096
# define gcdRATIO_FOR_SMALL_MEMORY 32
#endif
/******************************************************************************\
************************************* Debug ************************************
\******************************************************************************/
/* Possible debug flags. */
#define gcdDEBUG_NONE 0
#define gcdDEBUG_ALL (1 << 0)
#define gcdDEBUG_FATAL (1 << 1)
#define gcdDEBUG_TRACE (1 << 2)
#define gcdDEBUG_BREAK (1 << 3)
#define gcdDEBUG_ASSERT (1 << 4)
#define gcdDEBUG_CODE (1 << 5)
#define gcdDEBUG_STACK (1 << 6)
#define gcmIS_DEBUG(flag) ( gcdDEBUG & (flag | gcdDEBUG_ALL) )
#ifndef gcdDEBUG
# define gcdDEBUG gcdDEBUG_NONE
#endif
#endif /* __gc_hal_options_internal_h_ */
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