path: root/rnndb/state_2d.xml

<?xml version="1.0" encoding="UTF-8"?>
<!-- Copyright (c) 2012-2013 The Etnaviv Project

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<!-- Vivante GCxxxx render states and registers overview:
     2D engine states, mostly taken from gcreg.h in gcx project.

     Be sure to set the PIPE to PIPE_2D (on a core with the respective
     capability) before programming any of these or using the DRAW_2D
     command.
  -->
<database xmlns="http://nouveau.freedesktop.org/"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">

<domain name="VIVS" brief="GPU state">
<!-- Enumerations for use in the 2D engine -->
    <enum name="DE_FORMAT" brief="2D pixel format"> <!-- 0..7 match RS_FORMAT in 3D engine -->
        <doc>
        Base pixel formats that can be used as source or destination for the 2D engine.
        Additional formats can be supported by using RGBA or UV swizzles.
        </doc>
        <value value="0" name="X4R4G4B4"/>
        <value value="1" name="A4R4G4B4"/>
        <value value="2" name="X1R5G5B5"/>
        <value value="3" name="A1R5G5B5"/>
        <value value="4" name="R5G6B5"/>
        <value value="5" name="X8R8G8B8"/>
        <value value="6" name="A8R8G8B8"/>
        <value value="7" name="YUY2" brief="YUV 4:2:2 interleaved per four bytes, Y0 Cb Y1 Cr"/>
        <value value="8" name="UYVY" brief="YUV 4:2:2 interleaved per four bytes, Cb Y0 Cr Y1"/>
        <value value="9" name="INDEX8" brief="8-bit palette indexed"/>
        <value value="10" name="MONOCHROME" brief="1 bit per pixel"/>
        <value value="15" name="YV12" brief="YUV 4:2:0 8-bit Y plane and 8 bit 2x2 subsampled V and U planes"/>
        <value value="16" name="A8"/>
        <value value="17" name="NV12" brief="YUV 4:2:0 8-bit Y plane and interleaved U/V plane with 2x2 subsampling"/>
        <value value="18" name="NV16" brief="YUV 4:2:2 8-bit Y plane and interleaved U/V plane with 2x1 subsampling"/>
        <value value="19" name="RG16" brief="Bayer, interleaved RGRG..(odd line), GBGB..(even line), 8-bit samples"/>
    </enum>
    <enum name="DE_SWIZZLE" brief="2D swizzle">
        <doc>
        Unlike the shader engine, the 2D engine has no full swizzle capability.
        Four predefined common swizzles are available, however these can be specified
        for both the source and destination.
        </doc>
        <value value="0" name="ARGB"/>
        <value value="1" name="RGBA"/>
        <value value="2" name="ABGR"/>
        <value value="3" name="BGRA"/>
    </enum>
    <enum name="DE_BLENDMODE" brief="2D blending mode">
        <value value="0" name="ZERO" brief="Akin to GL_ZERO"/>
        <value value="1" name="ONE" brief="Akin to GL_ONE"/>
        <value value="2" name="NORMAL" brief="Akin to GL_SRC_ALPHA"/>
        <value value="3" name="INVERSED" brief="Akin to GL_ONE_MINUS_SRC_COLOR"/>
        <value value="4" name="COLOR" brief="Akin to GL_SRC_COLOR"/>
        <value value="5" name="COLOR_INVERSED" brief="Akin to GL_ONE_MINUS_SRC_COLOR"/>
        <value value="6" name="SATURATED_ALPHA" brief="Akin to GL_SRC_ALPHA_SATURATE"/>
        <value value="7" name="SATURATED_DEST_ALPHA" brief="No GL equivalent"/>
    </enum>
    <bitset name="DE_COLOR" brief="2D engine color"> <!-- 2D engine uses BGRA everywhere -->
        <bitfield high="7" low="0" name="BLUE"/>
        <bitfield high="15" low="8" name="GREEN"/>
        <bitfield high="23" low="16" name="RED"/>
        <bitfield high="31" low="24" name="ALPHA"/>
    </bitset>
    <enum name="DE_COMPONENT" brief="2D engine color component">
        <value value="0" name="BLUE"/>
        <value value="1" name="GREEN"/>
        <value value="2" name="RED"/>
        <value value="3" name="ALPHA"/>
    </enum>
    <enum name="DE_ROT_MODE" brief="2D rotation mode">
        <value value="0" name="ROT0"/>
        <value value="1" name="FLIP_X"/>
        <value value="2" name="FLIP_Y"/>
        <value value="4" name="ROT90"/>
        <value value="5" name="ROT180"/>
        <value value="6" name="ROT270"/>
    </enum>
    <enum name="DE_MIRROR_MODE" brief="2D mirror mode">
        <value value="0" name="NONE"/>
        <value value="1" name="MIRROR_X"/>
        <value value="2" name="MIRROR_Y"/>
        <value value="3" name="MIRROR_XY"/>
    </enum>
    <enum name="2D_TRANSPARENCY_KIND" inline="yes">
        <value value="0" name="OPAQUE"/>
        <value value="1" name="MASK"/>
        <value value="2" name="KEY"/>
    </enum>
    <enum name="2D_TRANSPARENCY_OVERRIDE" inline="yes">
        <value value="0" name="DEFAULT"/>
        <value value="1" name="USE_ENABLE"/>
        <value value="2" name="USE_DISABLE"/>
    </enum>

<!-- These register patterns are used a few times,
     once for single-source blits, once in the BLOCK4 block for multi-source blits
     and once in the BLOCK8 block for multi-source blits.
     -->
    <bitset name="2D_SRC_STRIDE" inline="yes" brief="Stride of the source surface in bytes">
        <doc>
            To calculate the stride multiply the surface width in pixels
            (8-pixel aligned) by the number of bytes per pixel.
        </doc>
        <bitfield high="17" low="0" name="STRIDE"/>
    </bitset>
    <bitset name="2D_SRC_ROTATION_CONFIG" inline="yes" brief="Source rotation configuration">
        <doc>
            90 degree rotation configuration for the source surface. Width field specifies
            the width of the surface in pixels.
        </doc>
        <bitfield high="15" low="0" name="WIDTH"/>
        <bitfield high="16" low="16" name="ROTATION" type="ENABLE_DISABLE" brief="Enable rotation"/>
    </bitset>
    <bitset name="2D_SRC_CONFIG" inline="yes" brief="Source surface configuration register">
        <bitfield high="3" low="0" name="PE10_SOURCE_FORMAT" type="DE_FORMAT" brief="Source format (older PE10 only, PE20 uses SOURCE_FORMAT field)"/> <!--PE10-->
        <bitfield high="5" low="4" name="TRANSPARENCY"/>
        <bitfield high="6" low="6" name="SRC_RELATIVE" brief="Source relative">
            <value value="0" name="ABSOLUTE">
                <doc>
                If set to ABSOLUTE, the source coordinates are treated as absolute coordinates
                inside the source surface.
                </doc>
            </value>
            <value value="1" name="RELATIVE">
                <doc>
                If set to RELATIVE, the source coordinates are treated as the offsets from
                the destination coordinates with the source size equal to the size of the
                destination.
                </doc>
            </value>
        </bitfield>
        <bitfield high="7" low="7" name="TILED" type="ENABLE_DISABLE" brief="Source linear/tiled computation control"/>
        <bitfield high="8" low="8" name="LOCATION" brief="Source data location">
            <doc>
            Set to STREAM for mono expansion blits or masked blits.
            For mono expansion blits the complete bitmap comes from the command stream.
            For masked blits the source data comes from the memory and the mask from the
            command stream.
            </doc>
            <value value="0" name="MEMORY" brief="From memory"/>
            <value value="1" name="STREAM" brief="From command stream: set for mono expansion blits or masked blits"/>
        </bitfield>
        <bitfield high="13" low="12" name="PACK" brief="Mono expansion or masked blit: stream packing in pixels">
            <doc>
            Determines how many horizontal pixels there are per each 32-bit chunk.
            For example, if set to PACKED8, each 32-bit chunk is 8-pixel wide, which also means that
            it defines 4 vertical lines of pixels.
            </doc>
            <value value="0" name="PACKED8"/>
            <value value="1" name="PACKED16"/>
            <value value="2" name="PACKED32"/>
            <value value="3" name="UNPACKED"/>
        </bitfield>
        <bitfield high="15" low="15" name="MONO_TRANSPARENCY" brief="Mono expansion">
            <value value="0" name="BACKGROUND" brief="Transparency color will be 0"/>
            <value value="1" name="FOREGROUND" brief="Transparancy color will be 1"/>
        </bitfield>
        <bitfield high="16" low="16" name="UNK16"/>
        <bitfield high="21" low="20" name="SWIZZLE" type="DE_SWIZZLE" brief="Color channel swizzles"/>
        <bitfield high="28" low="24" name="SOURCE_FORMAT" type="DE_FORMAT" brief="Pixel format of the source surface"/>
        <bitfield high="29" low="29" name="DISABLE420_L2_CACHE" brief="Disable 420 L2 cache"/> <!-- if chip has 420 L2 cache -->
        <bitfield high="31" low="30" name="ENDIAN_CONTROL" type="ENDIAN_MODE" brief="Source endianness"/>
    </bitset>
    <bitset name="2D_SRC_ORIGIN" inline="yes" brief="Source origin">
        <doc>
        Absolute or relative (determined by the SRC_RELATIVE field of the SRC_CONFIG register)
        X and Y coordinates in pixels of the top left corner of the source rectangle within
        the source surface.
        </doc>
        <bitfield high="15" low="0" name="X"/>
        <bitfield high="31" low="16" name="Y"/>
    </bitset>
    <bitset name="2D_SRC_SIZE" inline="yes" brief="Source size">
        <doc>
        The width and height of the source rectangle in pixels. If the source is relative,
        or a regular bitblt is being performed without stretching, this register is ignored
        and the source size is assumed to be the same as the destination size.
        </doc>
        <bitfield high="15" low="0" name="X"/>
        <bitfield high="31" low="16" name="Y"/>
    </bitset>
    <bitset name="2D_ROP" inline="yes" brief="Raster operation">
        <doc>
        Raster operation foreground and background codes. Even though ROP
        is not used in CLEAR, HOR_FILTER_BLT, VER_FILTER_BLT and alpha-enabled
        BIT_BLTs, ROP code still has to be programmed, because the engine makes the
        decision whether source, destination and pattern are involved in the current
        operation and the correct decision is essential for the engine to complete
        the operation as expected.

        ROP builds a lookup table for a logical operation with 2, 3 or 4 inputs
        (depending on ROP type). So for a ROP3, for example, the rop pattern will be
        2^3=8 bits.

        ROP2_PATTERN [untested]
            bit 0 destination
            bit 1 pattern

        ROP2_SOURCE [untested]
            bit 0 destination
            bit 1 source

        ROP3 (uses ROP_FG only)
            bit 0 destination
            bit 1 source
            bit 2 pattern

        ROP4 (uses ROP_FG and ROP_BG)
            bit 0 destination
            bit 1 source
            bit 2 pattern
            bit "3" foreground/background (ROP_FG / ROP_BG)
        </doc>
        <bitfield high="7" low="0" name="ROP_FG" brief="Foreground ROP code is used for opaque pixels"/>
        <bitfield high="15" low="8" name="ROP_BG" brief="Background ROP code is used for transparent pixels"/>
        <bitfield high="21" low="20" name="TYPE" brief="ROP type">
            <value value="0" name="ROP2_PATTERN"/>
            <value value="1" name="ROP2_SOURCE"/>
            <value value="2" name="ROP3"/>
            <value value="3" name="ROP4"/>
        </bitfield>
    </bitset>
    <bitset name="2D_ALPHA_CONTROL" inline="yes">
        <bitfield high="0" low="0" name="ENABLE" brief="Enable alpha blending (disables ROP)">
            <value value="0" name="OFF"/>
            <value value="1" name="ON"/>
        </bitfield>
        <bitfield high="23" low="16" name="PE10_GLOBAL_SRC_ALPHA" brief="Global source alpha (PE10)"/> <!--PE10-->
        <bitfield high="31" low="24" name="PE10_GLOBAL_DST_ALPHA" brief="Global destination alpha (PE10)"/> <!--PE10-->
    </bitset>
    <bitset name="2D_ALPHA_MODES" inline="yes">
        <bitfield high="0" low="0" name="SRC_ALPHA_MODE">
            <value value="0" name="NORMAL"/>
            <value value="1" name="INVERSED"/>
        </bitfield>
        <bitfield high="4" low="4" name="DST_ALPHA_MODE">
            <value value="0" name="NORMAL"/>
            <value value="1" name="INVERSED"/>
        </bitfield>
        <bitfield high="9" low="8" name="GLOBAL_SRC_ALPHA_MODE">
            <value value="0" name="NORMAL" brief="Don't use global source alpha"/>
            <value value="1" name="GLOBAL" brief="Use global source alpha"/>
            <value value="2" name="SCALED" brief="Scale source alpha with global source alpha"/>
        </bitfield>
        <bitfield high="13" low="12" name="GLOBAL_DST_ALPHA_MODE">
            <value value="0" name="NORMAL" brief="Don't use global destination alpha"/>
            <value value="1" name="GLOBAL" brief="Use global destination alpha"/>
            <value value="2" name="SCALED" brief="Scale destination alpha with global destination alpha"/>
        </bitfield>
        <bitfield high="16" low="16" name="PE10_SRC_COLOR_MULTIPLY" type="ENABLE_DISABLE" brief="Multiply source color with source alpha"> <!--PE10-->
            <doc>
            Used to choose between premultiplied and non-premultiplied alpha for the source color on PE10.
            PE20 hardware uses the COLOR_MULTIPLY_MODES register for this instead, which offers more flexibility.
            Normally this is enabled together with PE10_DST_COLOR_MULTIPLY.
            </doc>
        </bitfield>
        <bitfield high="20" low="20" name="PE10_DST_COLOR_MULTIPLY" type="ENABLE_DISABLE" brief="Multiply destination color with destination alpha"> <!--PE10-->
            <doc>
            Used to choose between premultiplied and non-premultiplied alpha for the source color on PE10.
            PE20 hardware uses the COLOR_MULTIPLY_MODES register for this instead, which offers more flexibility.
            Normally this is enabled together with PE10_SRC_COLOR_MULTIPLY.
            </doc>
        </bitfield>
        <bitfield high="26" low="24" name="SRC_BLENDING_MODE" type="DE_BLENDMODE"/>
        <bitfield high="27" low="27" name="SRC_ALPHA_FACTOR" type="ENABLE_DISABLE" brief="Src blending factor is calculated from src alpha"/> <!-- FULL_DIRECTFB -->
        <bitfield high="30" low="28" name="DST_BLENDING_MODE" type="DE_BLENDMODE"/>
        <bitfield high="31" low="31" name="DST_ALPHA_FACTOR" type="ENABLE_DISABLE" brief="Dst blending factor is calculated from dst alpha"/> <!-- FULL_DIRECTFB -->
    </bitset>
    <bitset name="2D_SRC_ROTATION_HEIGHT" inline="yes">
        <doc>
        180/270 degree rotation configuration for the source surface.
        Height field specifies the height of the surface in pixels.
        </doc>
        <bitfield high="15" low="0" name="HEIGHT"/>
    </bitset>
    <bitset name="2D_ROT_ANGLE" masked="yes" inline="yes">
        <doc>
        0/90/180/270 degree rotation and mirroring configuration for the source and destination surface.
        Height field specifies the height of the surface in pixels.
        </doc>
        <bitfield high="2" low="0" name="SRC" type="DE_ROT_MODE"/>
        <bitfield high="5" low="3" name="DST" type="DE_ROT_MODE"/>
        <bitfield high="8" low="8" name="SRC_MASK"/>
        <bitfield high="9" low="9" name="DST_MASK"/>
        <bitfield high="13" low="12" name="SRC_MIRROR" type="DE_MIRROR_MODE"/>
        <bitfield high="15" low="15" name="SRC_MIRROR_MASK"/>
        <bitfield high="17" low="16" name="DST_MIRROR" type="DE_MIRROR_MODE"/>
        <bitfield high="19" low="19" name="DST_MIRROR_MASK"/>
    </bitset>
    <bitset name="2D_COLOR_MULTIPLY_MODES" inline="yes">
        <doc>
        Color modes to multiply source or destination pixel color by alpha channel.
        Alpha can be from global color source or current pixel.
        </doc>
        <bitfield high="0" low="0" name="SRC_PREMULTIPLY" type="ENABLE_DISABLE"/>
        <bitfield high="4" low="4" name="DST_PREMULTIPLY" type="ENABLE_DISABLE"/>
        <bitfield high="9" low="8" name="SRC_GLOBAL_PREMULTIPLY">
            <value value="0" name="DISABLE"/>
            <value value="1" name="ALPHA"/>
            <value value="2" name="COLOR"/>
        </bitfield>
        <bitfield high="20" low="20" name="DST_DEMULTIPLY" type="ENABLE_DISABLE"/>
    </bitset>
    <bitset name="2D_PE_TRANSPARENCY" inline="yes">
        <bitfield high="1" low="0" name="SOURCE" type="2D_TRANSPARENCY_KIND" brief="Source transparency mode"/>
        <bitfield high="5" low="4" name="PATTERN" type="2D_TRANSPARENCY_KIND" brief="Pattern transparency mode">
            <doc>KEY transparency mode is reserved.</doc>
        </bitfield>
        <bitfield high="9" low="8" name="DESTINATION" type="2D_TRANSPARENCY_KIND" brief="Destination transparency mode">
            <doc>MASK transparency mode is reserved.</doc>
        </bitfield>
        <bitfield high="12" low="12" name="TRANSPARENCY_MASK" brief="Mask field for SOURCE/PATTERN/DESTINATION fields"/>
        <bitfield high="17" low="16" name="USE_SRC_OVERRIDE" type="2D_TRANSPARENCY_OVERRIDE" brief="Source usage override"/>
        <bitfield high="21" low="20" name="USE_PAT_OVERRIDE" type="2D_TRANSPARENCY_OVERRIDE" brief="Pattern usage override"/>
        <bitfield high="25" low="24" name="USE_DST_OVERRIDE" type="2D_TRANSPARENCY_OVERRIDE" brief="Destination usage override"/>
        <bitfield high="28" low="28" name="RESOURCE_OVERRIDE_MASK" brief="2D resource usage override mask field"/>
        <bitfield high="29" low="29" name="DFB_COLOR_KEY" type="ENABLE_DISABLE" brief="DBF color key"/>
        <bitfield high="31" low="31" name="DFB_COLOR_KEY_MASK"/>
    </bitset>
    <bitset name="2D_PE_CONTROL" masked="yes" inline="yes" brief="General purpose control register">
        <bitfield high="0" low="0" name="YUV">
            <value value="0" name="601" brief="Color space BT.601"/>
            <value value="1" name="709" brief="Color space BT.709"/>
        </bitfield>
        <bitfield high="3" low="3" name="YUV_MASK"/>
        <bitfield high="4" low="4" name="UV_SWIZZLE">
            <value value="0" name="UV"/>
            <value value="1" name="VU" brief="Swap UV components"/>
        </bitfield>
        <bitfield high="7" low="7" name="UV_SWIZZLE_MASK"/>
        <bitfield high="8" low="8" name="YUVRGB" type="ENABLE_DISABLE" brief="YUV to RGB convert enable"/>
        <bitfield high="11" low="11" name="YUVRGB_MASK"/>
    </bitset>
    <bitset name="2D_SRC_EX_CONFIG" masked="yes" inline="yes">
        <bitfield high="0" low="0" name="MULTI_TILED" type="ENABLE_DISABLE"/>
        <bitfield high="3" low="3" name="SUPER_TILED" type="ENABLE_DISABLE"/>
        <bitfield high="8" low="8" name="MINOR_TILED" type="ENABLE_DISABLE"/>
    </bitset>

    <stripe name="DE" brief="2D Drawing Engine">
        <doc>2D drawing engine: conversion, scaling, filtering, rotation, blending of 2D images.</doc>
        <reg32 offset="0x01200" name="SRC_ADDRESS" type="VIVM" brief="32-bit aligned base address of the source surface"/>
        <reg32 offset="0x01204" name="SRC_STRIDE" type="2D_SRC_STRIDE"/>
        <reg32 offset="0x01208" name="SRC_ROTATION_CONFIG" type="2D_SRC_ROTATION_CONFIG"/>
        <reg32 offset="0x0120C" name="SRC_CONFIG" type="2D_SRC_CONFIG"/>
        <reg32 offset="0x01210" name="SRC_ORIGIN" type="2D_SRC_ORIGIN"/>
        <reg32 offset="0x01214" name="SRC_SIZE" type="2D_SRC_SIZE"/>
        <reg32 offset="0x01218" name="SRC_COLOR_BG" type="DE_COLOR" brief="Source color background">
            <doc>
            In mono expansion this register defines the source color if the mono pixel is 0.
            The color must be set in A8R8G8B8 format.
            In color blits it defines the source transparency color and must be of the same
            format as the source format.
            </doc>
        </reg32>
        <reg32 offset="0x0121C" name="SRC_COLOR_FG" type="DE_COLOR">
            <doc>
            In mono expansion this register defines the source color if the mono pixel is 1.
            The color must be set in A8G8G8B8 format.
            </doc>
        </reg32>
        <reg32 offset="0x01220" name="STRETCH_FACTOR_LOW">
            <bitfield high="30" low="0" name="X" brief="Horizontal stretch factor in 15.16 fixed point format">
                <doc>
                The value is calculated using the following formula:

                    factor = ((srcWidth - 1) &lt;&lt; 16) / (dstWidth - 1)

                Stretch blit uses only the integer part of the value while Filter blit uses all
                31 bits.
                </doc>
            </bitfield>
        </reg32>
        <reg32 offset="0x01224" name="STRETCH_FACTOR_HIGH">
            <bitfield high="30" low="0" name="Y" brief="Vertical stretch factor in 15.16 fixed point format">
                <doc>
                The value is calculated using the following formula:

                    factor = ((srcWidth - 1) &lt;&lt; 16) / (dstWidth - 1)

                Stretch blit uses only the integer part of the value while Filter blit uses all
                31 bits.
                </doc>
            </bitfield>
        </reg32>
        <reg32 offset="0x01228" name="DEST_ADDRESS" type="VIVM" brief="32-bit aligned base address of the destination surface"/>
        <reg32 offset="0x0122C" name="DEST_STRIDE" brief="Stride of the destination surface in bytes">
            <doc>
                To calculate the stride multiply the surface width in pixels (8-pixel aligned) by
                the number of bytes per pixel.
            </doc>
            <bitfield high="17" low="0" name="STRIDE"/>
        </reg32>
        <reg32 offset="0x01230" name="DEST_ROTATION_CONFIG" brief="90 degree rotation configuration for the destination surface">
            <doc>
                90 degree rotation configuration for the destination surface. Width field specifies
                the width of the surface in pixels.
            </doc>
            <bitfield high="15" low="0" name="WIDTH"/>
            <bitfield high="16" low="16" name="ROTATION" type="ENABLE_DISABLE" brief="Enable rotation"/>
        </reg32>
        <reg32 offset="0x01234" name="DEST_CONFIG" brief="Destination surface configuration register">
            <bitfield high="4" low="0" name="FORMAT" type="DE_FORMAT" brief="Pixel format of the destination surface"/>
            <bitfield high="8" low="8" name="TILED" type="ENABLE_DISABLE" brief="Destination linear/tiled address computation control">
                <doc>Reserved field for future expansion.</doc>
            </bitfield>
            <bitfield high="15" low="12" name="COMMAND" brief="Type of primitive to be rendered">
                <value value="0" name="CLEAR" brief="Clear">
                    <doc>Draw solid filled rectangles.</doc>
                </value>
                <value value="1" name="LINE" brief="Line">
                    <doc>Draw lines. Lines can either be filled with a solid color or a pattern.</doc>
                </value>
                <value value="2" name="BIT_BLT" brief="Bitblit"/>
                <value value="3" name="BIT_BLT_REVERSED" brief="Defined for internal use and should not be used"/>
                <value value="4" name="STRETCH_BLT" brief="Stretch blt"/>
                <value value="5" name="HOR_FILTER_BLT" brief="Horizontal filter blit"/>
                <value value="6" name="VER_FILTER_BLT" brief="Vertical filter blit"/>
                <value value="7" name="ONE_PASS_FILTER_BLT" brief="One-pass filter blit"/>
                <value value="8" name="MULTI_SOURCE_BLT" brief="Multi source blit"/>
            </bitfield>
            <bitfield high="17" low="16" name="SWIZZLE" type="DE_SWIZZLE" brief="Color channel swizzles"/>
            <bitfield high="21" low="20" name="ENDIAN_CONTROL" type="ENDIAN_MODE" brief="Destination endianness"/>
            <bitfield high="24" low="24" name="GDI_STRE" type="ENABLE_DISABLE" brief="GDI stretch blit"/>
            <bitfield high="25" low="25" name="INTER_TILE_PER_FIX" brief="Performance fix for DE">
                <value value="1" name="DISABLED"/>
                <value value="0" name="ENABLED"/>
            </bitfield>
            <bitfield high="26" low="26" name="MINOR_TILED" type="ENABLE_DISABLE" brief="MinorTile"/>
        </reg32>
        <reg32 offset="0x01238" name="PATTERN_ADDRESS" type="VIVM" brief="Source address for pattern"/>
        <reg32 offset="0x0123C" name="PATTERN_CONFIG" brief="Pattern configuration word">
            <bitfield high="3" low="0" name="FORMAT"/>
            <bitfield high="4" low="4" name="TYPE">
                <value value="0" name="SOLID_COLOR"/>
                <value value="1" name="PATTERN"/>
            </bitfield>
            <bitfield high="5" low="5" name="COLOR_CONVERT" type="ENABLE_DISABLE"/>
            <bitfield high="7" low="6" name="INIT_TRIGGER"/>
            <bitfield high="18" low="16" name="ORIGIN_X"/>
            <bitfield high="22" low="20" name="ORIGIN_Y"/>
        </reg32>
        <reg32 offset="0x01240" name="PATTERN_LOW"/>
        <reg32 offset="0x01244" name="PATTERN_HIGH"/>
        <reg32 offset="0x01248" name="PATTERN_MASK_LOW"/>
        <reg32 offset="0x0124C" name="PATTERN_MASK_HIGH"/>
        <reg32 offset="0x01250" name="PATTERN_BG_COLOR" type="DE_COLOR" brief="Background color for pattern"/>
        <reg32 offset="0x01254" name="PATTERN_FG_COLOR" type="DE_COLOR" brief="Foreground color for pattern"/>
        <reg32 offset="0x0125C" name="ROP" type="2D_ROP"/>
        <reg32 offset="0x01260" name="CLIP_TOP_LEFT" brief="Top left corner of the clipping rectangle">
            <doc>
            Clipping is always on (except with filter blits) and everything beyond the clipping rectangle will be clipped out.
            Top left coordinates are inclusive.
            </doc>
            <bitfield high="14" low="0" name="X"/>
            <bitfield high="30" low="16" name="Y"/>
        </reg32>
        <reg32 offset="0x01264" name="CLIP_BOTTOM_RIGHT" brief="Bottom right corner of the clipping rectangle">
            <doc>
            Clipping is always on (except with filter blits) and everything beyond the clipping rectangle will be clipped out.
            Bottom right coordinates are exclusive.
            </doc>
            <bitfield high="14" low="0" name="X"/>
            <bitfield high="30" low="16" name="Y"/>
        </reg32>
        <reg32 offset="0x01268" name="CLEAR_BYTE_MASK"> <!-- PE10 -->
            <doc>
            Byte pattern mask used for clearing. PE1.0 uses a 8-byte pattern for clearing
            as specified in the CLEAR_PIXEL_VALUE_LOW and CLEAR_PIXEL_VALUE_HIGH registers.
            Each of 8 bits refers to a byte. A value of 1 clears the respective byte,
            and a value of 0 ignores it.
            </doc>
        </reg32>
        <reg32 offset="0x0126C" name="CONFIG" brief="Drawing engine configuration">
            <bitfield high="0" low="0" name="MIRROR_BLT_ENABLE">
                <value value="0" name="OFF"/>
                <value value="1" name="ON"/>
            </bitfield>
            <bitfield high="5" low="4" name="MIRROR_BLT_MODE">
                <value value="0" name="NORMAL"/>
                <value value="1" name="HMIRROR"/>
                <value value="2" name="VMIRROR"/>
                <value value="3" name="FULL_MIRROR"/>
            </bitfield>
            <bitfield high="18" low="16" name="SOURCE_SELECT" brief="Source select for the old walkers"/>
            <bitfield high="21" low="20" name="DESTINATION_SELECT" brief="Destination select for the old walkers"/>
        </reg32>
        <reg32 offset="0x01270" name="CLEAR_PIXEL_VALUE_LOW"> <!-- PE10 -->
            <doc>
            This register and CLEAR_PIXEL_VALUE_HIGH specify a 8-byte pattern to be used for CLEAR operations.
            </doc>
        </reg32>
        <reg32 offset="0x01274" name="CLEAR_PIXEL_VALUE_HIGH"/> <!-- PE10 -->
        <reg32 offset="0x01278" name="SRC_ORIGIN_FRACTION" brief="Fraction for the source origin">
            <doc>
            Together with values in SRC_ORIGIN these values form signed 16.16 fixed point origin
            for the source rectangle. Fractions are only used in filter blit in split frame mode.
            </doc>
            <bitfield high="15" low="0" name="X"/>
            <bitfield high="31" low="16" name="Y"/>
        </reg32>
        <reg32 offset="0x0127C" name="ALPHA_CONTROL" type="2D_ALPHA_CONTROL"/>
        <reg32 offset="0x01280" name="ALPHA_MODES" type="2D_ALPHA_MODES"/>
        <reg32 offset="0x01284" name="UPLANE_ADDRESS" type="VIVM" brief="32-bit aligned base address of the source U plane"/>
        <reg32 offset="0x01288" name="UPLANE_STRIDE" type="2D_SRC_STRIDE" brief="Stride of the source U plane in bytes"/>
        <reg32 offset="0x0128C" name="VPLANE_ADDRESS" type="VIVM" brief="32-bit aligned base address of the source V plane"/>
        <reg32 offset="0x01290" name="VPLANE_STRIDE" type="2D_SRC_STRIDE" brief="Stride of the source V plane in bytes"/>
        <reg32 offset="0x01294" name="VR_CONFIG" masked="yes" brief="Video rasterizer kick-off register">
            <bitfield high="1" low="0" name="START" brief="Kick-off command">
                <value value="0" name="HORIZONTAL_BLIT"/>
                <value value="1" name="VERTICAL_BLIT"/>
                <value value="2" name="ONE_PASS_BLIT"/>
            </bitfield>
            <bitfield high="3" low="3" name="START_MASK"/>
        </reg32>
        <reg32 offset="0x01298" name="VR_SOURCE_IMAGE_LOW" brief="Top left corner of bounding box of the source image">
            <bitfield high="15" low="0" name="LEFT"/>
            <bitfield high="31" low="16" name="TOP"/>
        </reg32>
        <reg32 offset="0x0129C" name="VR_SOURCE_IMAGE_HIGH" brief="Right bottom corner of bounding box of the source image">
            <bitfield high="15" low="0" name="RIGHT"/>
            <bitfield high="31" low="16" name="BOTTOM"/>
        </reg32>
        <reg32 offset="0x012A0" name="VR_SOURCE_ORIGIN_LOW" brief="Fractional x coordinate of the source window to be rendered within the source image">
            <bitfield high="31" low="0" name="X"/>
        </reg32>
        <reg32 offset="0x012A4" name="VR_SOURCE_ORIGIN_HIGH" brief="Fractional y coordinate of the source window to be rendered within the source image">
            <bitfield high="31" low="0" name="Y"/>
        </reg32>
        <reg32 offset="0x012A8" name="VR_TARGET_WINDOW_LOW" brief="Left top corner of the destination window to be rendered within the destination image">
            <bitfield high="15" low="0" name="LEFT"/>
            <bitfield high="31" low="16" name="TOP"/>
        </reg32>
        <reg32 offset="0x012AC" name="VR_TARGET_WINDOW_HIGH" brief="Bottom right corner of the destination window to be rendered within the destination image">
            <bitfield high="15" low="0" name="RIGHT"/>
            <bitfield high="31" low="16" name="BOTTOM"/>
        </reg32>
        <reg32 offset="0x012B0" name="PE_CONFIG" masked="yes" brief="PE debug register">
            <bitfield high="1" low="0" name="DESTINATION_FETCH">
                <doc>
                Bypass destination fetch when writing part of a cache block.
                Destination fetch can be disabled if the area around the target rectangle is not important.
                </doc>
                <value value="0" name="DISABLE"/>
                <value value="1" name="DEFAULT"/>
                <value value="2" name="ALWAYS"/>
            </bitfield>
            <bitfield high="3" low="3" name="DESTINATION_FETCH_MASK"/>
        </reg32>
        <reg32 offset="0x012B4" name="DEST_ROTATION_HEIGHT">
            <doc>
            180/270 degree rotation configuration for the destination surface.
            Height field specifies the height of the surface in pixels.
            </doc>
            <bitfield high="15" low="0" name="HEIGHT"/>
        </reg32>
        <reg32 offset="0x012B8" name="SRC_ROTATION_HEIGHT" type="2D_SRC_ROTATION_HEIGHT"/>
        <reg32 offset="0x012BC" name="ROT_ANGLE" type="2D_ROT_ANGLE"/>
        <reg32 offset="0x012C0" name="CLEAR_PIXEL_VALUE32" type="DE_COLOR" brief="Clear color value in A8R8G8B8 format"/> <!--PE20-->
        <reg32 offset="0x012C4" name="DEST_COLOR_KEY" type="DE_COLOR" brief="Destination transparency color in destination format"/>
        <reg32 offset="0x012C8" name="GLOBAL_SRC_COLOR" type="DE_COLOR" brief="Global source color and alpha values"> <!--PE20-->
            <doc>
                Used as source color when blitting from A8 sources.
            </doc>
        </reg32>
        <reg32 offset="0x012CC" name="GLOBAL_DEST_COLOR" type="DE_COLOR" brief="Global destination color and alpha values"/>
        <reg32 offset="0x012D0" name="COLOR_MULTIPLY_MODES" type="2D_COLOR_MULTIPLY_MODES"/> <!--PE20-->
        <reg32 offset="0x012D4" name="PE_TRANSPARENCY" type="2D_PE_TRANSPARENCY"/>
        <reg32 offset="0x012D8" name="PE_CONTROL" type="2D_PE_CONTROL"/>
        <reg32 offset="0x012DC" name="SRC_COLOR_KEY_HIGH" type="DE_COLOR" brief="Source transparency color in source format"/>
        <reg32 offset="0x012E0" name="DEST_COLOR_KEY_HIGH" type="DE_COLOR" brief="Destination transparency color in destination format"/>
        <reg32 offset="0x012E4" name="VR_CONFIG_EX" masked="yes" brief="Video rasterizer configuration register">
            <bitfield high="1" low="0" name="VERTICAL_LINE_WIDTH" brief="Line width in pixels for vertical pass">
                <value value="0" name="AUTO"/>
                <value value="1" name="PIXELS16"/>
                <value value="2" name="PIXELS32"/>
            </bitfield>
            <bitfield high="3" low="3" name="VERTICAL_LINE_WIDTH_MASK"/>
            <bitfield high="7" low="4" name="FILTER_TAP" brief="One pass filter tap"/>
            <bitfield high="8" low="8" name="FILTER_TAP_MASK"/>
        </reg32>
        <reg32 offset="0x012E8" name="PE_DITHER_LOW" brief="PE dither register (low)">
            <doc>
            If you don't want dither, set all fields to their reset values (0xFFFFFFFF).
            </doc>
            <bitfield high="3" low="0" name="PIXEL_X0_Y0" brief="X,Y = 0,0"/>
            <bitfield high="7" low="4" name="PIXEL_X1_Y0" brief="X,Y = 1,0"/>
            <bitfield high="11" low="8" name="PIXEL_X2_Y0" brief="X,Y = 2,0"/>
            <bitfield high="15" low="12" name="PIXEL_X3_Y0" brief="X,Y = 3,0"/>
            <bitfield high="19" low="16" name="PIXEL_X0_Y1" brief="X,Y = 0,1"/>
            <bitfield high="23" low="20" name="PIXEL_X1_Y1" brief="X,Y = 1,1"/>
            <bitfield high="27" low="24" name="PIXEL_X2_Y1" brief="X,Y = 2,1"/>
            <bitfield high="31" low="28" name="PIXEL_X3_Y1" brief="X,Y = 3,1"/>
        </reg32>
        <reg32 offset="0x012EC" name="PE_DITHER_HIGH" brief="PE dither register (high)">
            <doc>
            If you don't want dither, set all fields to their reset values (0xFFFFFFFF).
            </doc>
            <bitfield high="3" low="0" name="PIXEL_X0_Y2" brief="X,Y = 0,2"/>
            <bitfield high="7" low="4" name="PIXEL_X1_Y2" brief="X,Y = 1,2"/>
            <bitfield high="11" low="8" name="PIXEL_X2_Y2" brief="X,Y = 2,2"/>
            <bitfield high="15" low="12" name="PIXEL_X3_Y2" brief="X,Y = 3,2"/>
            <bitfield high="19" low="16" name="PIXEL_X0_Y3" brief="X,Y = 0,3"/>
            <bitfield high="23" low="20" name="PIXEL_X1_Y3" brief="X,Y = 1,3"/>
            <bitfield high="27" low="24" name="PIXEL_X2_Y3" brief="X,Y = 2,3"/>
            <bitfield high="31" low="28" name="PIXEL_X3_Y3" brief="X,Y = 3,3"/>
        </reg32>
        <reg32 offset="0x012F0" name="BW_CONFIG" masked="yes" brief="Block walk configuration">
            <bitfield high="0" low="0" name="BLOCK_CONFIG" brief="One pass filter block configuration">
                <value value="0" name="AUTO"/>
                <value value="1" name="CUSTOMIZE"/>
            </bitfield>
            <bitfield high="3" low="3" name="BLOCK_CONFIG_MASK"/>
            <bitfield high="4" low="4" name="BLOCK_WALK_DIRECTION" brief="Block walk direction in one pass filter blit">
                <value value="0" name="RIGHT_BOTTOM"/>
                <value value="1" name="BOTTOM_RIGHT"/>
            </bitfield>
            <bitfield high="7" low="7" name="BLOCK_WALK_DIRECTION_MASK"/>
            <bitfield high="8" low="8" name="TILE_WALK_DIRECTION" brief="Tile walk direction in one pass filter blit">
                <value value="0" name="RIGHT_BOTTOM"/>
                <value value="1" name="BOTTOM_RIGHT"/>
            </bitfield>
            <bitfield high="11" low="11" name="TILE_WALK_DIRECTION_MASK"/>
            <bitfield high="12" low="12" name="PIXEL_WALK_DIRECTION">
                <value value="0" name="RIGHT_BOTTOM"/>
                <value value="1" name="BOTTOM_RIGHT"/>
            </bitfield>
            <bitfield high="15" low="15" name="PIXEL_WALK_DIRECTION_MASK" brief="Pixel walk direction in one pass filter blits"/>
        </reg32>
        <reg32 offset="0x012F4" name="BW_BLOCK_SIZE" brief="Block walker block size">
            <bitfield high="15" low="0" name="WIDTH"/>
            <bitfield high="31" low="16" name="HEIGHT"/>
        </reg32>
        <reg32 offset="0x012F8" name="BW_TILE_SIZE" brief="Block walker tile size">
            <bitfield high="15" low="0" name="WIDTH"/>
            <bitfield high="31" low="16" name="HEIGHT"/>
        </reg32>
        <reg32 offset="0x012FC" name="BW_BLOCK_MASK" brief="Block walker block mask">
            <bitfield high="15" low="0" name="HORIZONTAL"/>
            <bitfield high="31" low="16" name="VERTICAL"/>
        </reg32>
        <reg32 offset="0x01300" name="SRC_EX_CONFIG">
            <bitfield high="0" low="0" name="MULTI_TILED" type="ENABLE_DISABLE" brief="Source multi tiled address computation control"/>
            <bitfield high="3" low="3" name="SUPER_TILED" type="ENABLE_DISABLE" brief="Source super tiled address computation control"/>
            <bitfield high="8" low="8" name="MINOR_TILED" type="ENABLE_DISABLE" brief="Source minor tiled address computation control"/>
        </reg32>
        <reg32 offset="0x01304" name="SRC_EX_ADDRESS" type="VIVM" brief="32-bit aligned base address of the source extra surface"/>
        <reg32 offset="0x01308" name="DE_MULTI_SOURCE" brief="Multisource control register">
            <bitfield high="2" low="0" name="MAX_SOURCE" brief="Number of source surfaces minus 1"/>
            <bitfield high="10" low="8" name="HORIZONTAL_BLOCK" brief="Number of pixels for horizontal block walker">
                <value value="0" name="PIXEL16"/>
                <value value="1" name="PIXEL32"/>
                <value value="2" name="PIXEL64"/>
                <value value="3" name="PIXEL128"/>
                <value value="4" name="PIXEL256"/>
                <value value="5" name="PIXEL512"/>
            </bitfield>
            <bitfield high="18" low="16" name="VERTICAL_BLOCK" brief="Number of lines for vertical block walker">
                <value value="0" name="LINE1"/>
                <value value="1" name="LINE2"/>
                <value value="2" name="LINE4"/>
                <value value="3" name="LINE8"/>
                <value value="4" name="LINE16"/>
                <value value="5" name="LINE32"/>
                <value value="6" name="LINE64"/>
                <value value="7" name="LINE128"/>
            </bitfield>
        </reg32>
        <reg32 offset="0x0130C" name="DEYUV_CONVERSION" brief="Configure the YUV to YUV conversion">
            <bitfield high="1" low="0" name="ENABLE" brief="Select the number of planes we need to process">
                <value value="0" name="OFF" brief="YUV to YUV conversion is turned off"/>
                <value value="1" name="PLANE1" brief="YUV to YUV conversion is writing to 1 plane"/>
                <value value="2" name="PLANE2" brief="YUV to YUV conversion is writing to 2 planes"/>
                <value value="3" name="PLANE3" brief="YUV to YUV conversion is writing to 3 planes"/>
            </bitfield>
            <bitfield high="3" low="2" name="PLANE1_COUNT" type="uint" brief="Number of channels to process - 1 for plane 1"/>
            <bitfield high="5" low="4" name="PLANE2_COUNT" type="uint" brief="Number of channels to process - 1 for plane 2"/>
            <bitfield high="7" low="6" name="PLANE3_COUNT" type="uint" brief="Number of channels to process - 1 for plane 3"/>
            <bitfield high="9" low="8" name="PLANE1_SWIZZLE_B" type="DE_COMPONENT" brief="Color channel to pick for B channel for plane 1"/>
            <bitfield high="11" low="10" name="PLANE1_SWIZZLE_G" type="DE_COMPONENT" brief="Color channel to pick for G channel for plane 1"/>
            <bitfield high="13" low="12" name="PLANE1_SWIZZLE_R" type="DE_COMPONENT" brief="Color channel to pick for R channel for plane 1"/>
            <bitfield high="15" low="14" name="PLANE1_SWIZZLE_A" type="DE_COMPONENT" brief="Color channel to pick for A channel for plane 1"/>
            <bitfield high="17" low="16" name="PLANE2_SWIZZLE_B" type="DE_COMPONENT" brief="Color channel to pick for B channel for plane 2"/>
            <bitfield high="19" low="18" name="PLANE2_SWIZZLE_G" type="DE_COMPONENT" brief="Color channel to pick for G channel for plane 2"/>
            <bitfield high="21" low="20" name="PLANE2_SWIZZLE_R" type="DE_COMPONENT" brief="Color channel to pick for R channel for plane 2"/>
            <bitfield high="23" low="22" name="PLANE2_SWIZZLE_A" type="DE_COMPONENT" brief="Color channel to pick for A channel for plane 2"/>
            <bitfield high="25" low="24" name="PLANE3_SWIZZLE_B" type="DE_COMPONENT" brief="Color channel to pick for B channel for plane 3"/>
            <bitfield high="27" low="26" name="PLANE3_SWIZZLE_G" type="DE_COMPONENT" brief="Color channel to pick for G channel for plane 3"/>
            <bitfield high="29" low="28" name="PLANE3_SWIZZLE_R" type="DE_COMPONENT" brief="Color channel to pick for R channel for plane 3"/>
            <bitfield high="31" low="30" name="PLANE3_SWIZZLE_A" type="DE_COMPONENT" brief="Color channel to pick for A channel for plane 3"/>
        </reg32>
        <reg32 offset="0x01310" name="DE_PLANE2_ADDRESS" type="VIVM" brief="Address for plane 2 if DEYUV_CONVERSION ENABLE is set to PLANE2 or PLANE3"/>
        <reg32 offset="0x01314" name="DE_PLANE2_STRIDE" type="2D_SRC_STRIDE" brief="Stride for plane 2 if DEYUV_CONVERSION ENABLE is set to PLANE2 or PLANE3"/>
        <reg32 offset="0x01318" name="DE_PLANE3_ADDRESS" type="VIVM" brief="Address for plane 3 if DEYUV_CONVERSION ENABLE is set to PLANE3"/>
        <reg32 offset="0x0131C" name="DE_PLANE3_STRIDE" type="2D_SRC_STRIDE" brief="Stride for plane 3 if DEYUV_CONVERSION ENABLE is set to PLANE3"/>
        <reg32 offset="0x01320" name="DE_STALL_DE">
            <bitfield high="0" low="0" name="ENABLE" type="ENABLE_DISABLE" brief="Stall DE enable"/>
        </reg32>
        <reg32 offset="0x01800" name="FILTER_KERNEL" length="128" brief="Filter blit coefficient table">
            <doc>
            The algorithm uses 5 bits of the pixel coordinate's fraction to index the kernel array,
            which makes it a 32-entry array. Each entry consists of 9 kernel values. In practice
            we store only a half of the table, because the other half is a mirror of the first,
            therefore:
                rows_to_store    = 32 / 2 + 1 = 17
                values_to_store  = rows_to_store * 9 = 153
                even_value_count = (values_to_store + 1) &amp; ~1 = 154
                dword_count      = even_value_count / 2 = 77
            </doc>
            <bitfield high="15" low="0" name="COEFFICIENT0" brief="1.14 fixed point plus sign bit"/>
            <bitfield high="31" low="16" name="COEFFICIENT1" brief="1.14 fixed point plus sign bit"/>
        </reg32>
        <reg32 offset="0x01C00" name="INDEX_COLOR_TABLE" length="256" type="DE_COLOR" brief="Index color table (PE10)"> <!--PE10-->
            <doc>
            256 color entries for the indexed color mode. Colors are assumed to be in
            the destination format and no color conversion is done on the values.
            This register is only used with chips with PE10 feature.
            </doc>
        </reg32>
        <reg32 offset="0x02800" name="HORI_FILTER_KERNEL" length="128" brief="One pass Filter blit horizontal coefficient table">
            <bitfield high="15" low="0" name="COEFFICIENT0"/>
            <bitfield high="31" low="16" name="COEFFICIENT1"/>
        </reg32>
        <reg32 offset="0x02A00" name="VERTI_FILTER_KERNEL" length="128" brief="One pass Filter blit vertical coefficient table">
            <bitfield high="15" low="0" name="COEFFICIENT0"/>
            <bitfield high="31" low="16" name="COEFFICIENT1"/>
        </reg32>
        <reg32 offset="0x03400" name="INDEX_COLOR_TABLE32" length="256" type="DE_COLOR" brief="Index color table (PE20)"> <!-- only PE20 -->
            <doc>
            256 color entries for the indexed color mode. Colors are assumed to be in
            A8R8G8B8 format and no color conversion is done on the values.
            This register is only used with chips with PE20 feature.
            </doc>
        </reg32>
        <!-- Multi-source blend -->
        <stripe name="BLOCK4" brief="Multi-source blit (up to 4)">
            <doc>
            These registers are used for multi-source blit when the capability 2D_MULTI_SOURCE_BLIT is available.
            </doc>
            <reg32 offset="0x12800" name="SRC_ADDRESS" length="4" type="VIVM"/>
            <reg32 offset="0x12810" name="SRC_STRIDE" length="4" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x12820" name="SRC_ROTATION_CONFIG" length="4" type="2D_SRC_ROTATION_CONFIG"/>
            <reg32 offset="0x12830" name="SRC_CONFIG" length="4" type="2D_SRC_CONFIG"/>
            <reg32 offset="0x12840" name="SRC_ORIGIN" length="4" type="2D_SRC_ORIGIN"/>
            <reg32 offset="0x12850" name="SRC_SIZE" length="4" type="2D_SRC_SIZE"/>
            <reg32 offset="0x12860" name="SRC_COLOR_BG" length="4" type="DE_COLOR"/>
            <reg32 offset="0x12870" name="ROP" length="4" type="2D_ROP"/>
            <reg32 offset="0x12880" name="ALPHA_CONTROL" length="4" type="2D_ALPHA_CONTROL"/>
            <reg32 offset="0x12890" name="ALPHA_MODES" length="4" type="2D_ALPHA_MODES"/>
            <reg32 offset="0x128A0" name="ADDRESS_U" length="4" type="VIVM"/>
            <reg32 offset="0x128B0" name="STRIDE_U" length="4" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x128C0" name="ADDRESS_V" length="4" type="VIVM"/>
            <reg32 offset="0x128D0" name="STRIDE_V" length="4" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x128E0" name="SRC_ROTATION_HEIGHT" length="4" type="2D_SRC_ROTATION_HEIGHT"/>
            <reg32 offset="0x128F0" name="ROT_ANGLE" length="4" type="2D_ROT_ANGLE"/>
            <reg32 offset="0x12900" name="GLOBAL_SRC_COLOR" length="4" type="DE_COLOR"/>
            <reg32 offset="0x12910" name="GLOBAL_DEST_COLOR" length="4" type="DE_COLOR"/>
            <reg32 offset="0x12920" name="COLOR_MULTIPLY_MODES" length="4" type="2D_COLOR_MULTIPLY_MODES"/>
            <reg32 offset="0x12930" name="TRANSPARENCY" length="4" type="2D_PE_TRANSPARENCY"/>
            <reg32 offset="0x12940" name="CONTROL" length="4" type="2D_PE_CONTROL"/>
            <reg32 offset="0x12950" name="SRC_COLOR_KEY_HIGH" length="4" type="DE_COLOR"/>
            <reg32 offset="0x12960" name="SRC_EX_CONFIG" length="4" type="2D_SRC_EX_CONFIG"/>
            <reg32 offset="0x12970" name="SRC_EX_ADDRESS" length="4" type="VIVM"/>
        </stripe>
        <stripe name="BLOCK8" brief="Multi-source blit extended (up to 8)">
            <doc>
            These registers are used for multi-source blit when the capability 2D_MULTI_SOURCE_BLIT_EX is available.
            </doc>
            <reg32 offset="0x12A00" name="SRC_ADDRESS" length="8" type="VIVM"/>
            <reg32 offset="0x12A20" name="SRC_STRIDE" length="8" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x12A40" name="SRC_ROTATION_CONFIG" length="8" type="2D_SRC_ROTATION_CONFIG"/>
            <reg32 offset="0x12A60" name="SRC_CONFIG" length="8" type="2D_SRC_CONFIG"/>
            <reg32 offset="0x12A80" name="SRC_ORIGIN" length="8" type="2D_SRC_ORIGIN"/>
            <reg32 offset="0x12AA0" name="SRC_SIZE" length="8" type="2D_SRC_SIZE"/>
            <reg32 offset="0x12AC0" name="SRC_COLOR_BG" length="8" type="DE_COLOR"/>
            <reg32 offset="0x12AE0" name="ROP" length="8" type="2D_ROP"/>
            <reg32 offset="0x12B00" name="ALPHA_CONTROL" length="8" type="2D_ALPHA_CONTROL"/>
            <reg32 offset="0x12B20" name="ALPHA_MODES" length="8" type="2D_ALPHA_MODES"/>
            <reg32 offset="0x12B40" name="ADDRESS_U" length="8" type="VIVM"/>
            <reg32 offset="0x12B60" name="STRIDE_U" length="8" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x12B80" name="ADDRESS_V" length="8" type="VIVM"/>
            <reg32 offset="0x12BA0" name="STRIDE_V" length="8" type="2D_SRC_STRIDE"/>
            <reg32 offset="0x12BC0" name="SRC_ROTATION_HEIGHT" length="8" type="2D_SRC_ROTATION_HEIGHT"/>
            <reg32 offset="0x12BE0" name="ROT_ANGLE" length="8" type="2D_ROT_ANGLE"/>
            <reg32 offset="0x12C00" name="GLOBAL_SRC_COLOR" length="8" type="DE_COLOR"/>
            <reg32 offset="0x12C20" name="GLOBAL_DEST_COLOR" length="8" type="DE_COLOR"/>
            <reg32 offset="0x12C40" name="COLOR_MULTIPLY_MODES" length="8" type="2D_COLOR_MULTIPLY_MODES"/>
            <reg32 offset="0x12C60" name="TRANSPARENCY" length="8" type="2D_PE_TRANSPARENCY"/>
            <reg32 offset="0x12C80" name="CONTROL" length="8" type="2D_PE_CONTROL"/>
            <reg32 offset="0x12CA0" name="SRC_COLOR_KEY_HIGH" length="8" type="DE_COLOR"/>
            <reg32 offset="0x12CC0" name="SRC_EX_CONFIG" length="8" type="2D_SRC_EX_CONFIG"/>
            <reg32 offset="0x12CE0" name="SRC_EX_ADDRESS" length="8" type="VIVM"/>
        </stripe>
    </stripe>
</domain>
</database>