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2016-08-23Automatically select initial xlation lookup levelAntonio Nino Diaz
Instead of hardcoding a level 1 table as the base translation level table, let the code decide which level is the most appropriate given the virtual address space size. As the table granularity is 4 KB, this allows the code to select level 0, 1 or 2 as base level for AArch64. This way, instead of limiting the virtual address space width to 39-31 bits, widths of 48-25 bit can be used. For AArch32, this change allows the code to select level 1 or 2 as the base translation level table and use virtual address space width of 32-25 bits. Also removed some unused definitions related to translation tables. Fixes ARM-software/tf-issues#362 Change-Id: Ie3bb5d6d1a4730a26700b09827c79f37ca3cdb65
2016-08-10AArch32: Add translation table library supportSoby Mathew
This patch adds translation library supports for AArch32 platforms. The library only supports long descriptor formats for AArch32. The `enable_mmu_secure()` enables the MMU for secure world with `TTBR0` pointing to the populated translation tables. Change-Id: I061345b1779391d098e35e7fe0c76e3ebf850e08
2016-08-09Fix the translation table library for wraparound casesSoby Mathew
This patch fixes the translation table library for wraparound cases. These cases are not expected to occur on AArch64 platforms because only the 48 bits of the 64 bit address space are used. But it is a possibility for AArch32 platforms. Change-Id: Ie7735f7ba2977019381e1c124800381471381499
2016-07-18Rework type usage in Trusted FirmwareSoby Mathew
This patch reworks type usage in generic code, drivers and ARM platform files to make it more portable. The major changes done with respect to type usage are as listed below: * Use uintptr_t for storing address instead of uint64_t or unsigned long. * Review usage of unsigned long as it can no longer be assumed to be 64 bit. * Use u_register_t for register values whose width varies depending on whether AArch64 or AArch32. * Use generic C types where-ever possible. In addition to the above changes, this patch also modifies format specifiers in print invocations so that they are AArch64/AArch32 agnostic. Only files related to upcoming feature development have been reworked. Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
2016-07-08Introduce utils.h header fileSandrine Bailleux
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, architecture, platform and even not specific to Trusted Firmware. For now, it contains only 2 macros: ARRAY_SIZE() and IS_POWER_OF_TWO(). These were previously defined in bl_common.h and xlat_tables.c respectively. bl_common.h includes utils.h to retain compatibility for platforms that relied on bl_common.h for the ARRAY_SIZE() macro. Upstream platform ports that use this macro have been updated to include utils.h. Change-Id: I960450f54134f25d1710bfbdc4184f12c049a9a9
2016-07-08xlat lib: Introduce MT_EXECUTE/MT_EXECUTE_NEVER attributesSandrine Bailleux
This patch introduces the MT_EXECUTE/MT_EXECUTE_NEVER memory mapping attributes in the translation table library to specify the access permissions for instruction execution of a memory region. These new attributes should be used only for normal, read-only memory regions. For other types of memory, the translation table library still enforces the following rules, regardless of the MT_EXECUTE/MT_EXECUTE_NEVER attribute: - Device memory is always marked as execute-never. - Read-write normal memory is always marked as execute-never. Change-Id: I8bd27800a8c1d8ac1559910caf4a4840cf25b8b0
2016-07-08xlat lib: Refactor mmap_desc() functionSandrine Bailleux
This patch clarifies the mmap_desc() function by adding some comments and reorganising its code. No functional change has been introduced. Change-Id: I873493be17b4e60a89c1dc087dd908b425065401
2016-04-26Fix computation of L1 bitmask in the translation table libSandrine Bailleux
This patch fixes the computation of the bitmask used to isolate the level 1 field of a virtual address. The whole computation needs to work on 64-bit values to produce the correct bitmask value. XLAT_TABLE_ENTRIES_MASK being a C constant, it is a 32-bit value so it needs to be extended to a 64-bit value before it takes part in any other computation. This patch fixes this bug by casting XLAT_TABLE_ENTRIES_MASK as an unsigned long long. Note that this bug doesn't manifest itself in practice because address spaces larger than 39 bits are not yet supported in the Trusted Firmware. Change-Id: I955fd263ecb691ca94b29b9c9f576008ce1d87ee
2016-04-15Limit support for region overlaps in xlat_tablesAntonio Nino Diaz
The only case in which regions can now overlap is if they are identity mapped or they have the same virtual to physical address offset (identity mapping is just a particular case of the latter). They must overlap completely (i.e. one of them must be completely inside the other one) and not cover the same area. This allow future enhancements to the xlat_tables library without having to support unnecessarily complex edge cases. Outer regions are now sorted by mmap_add_region() before inner regions with the same base virtual address for consistency: all regions contained inside another one must be placed after the outer one in the list. If an inner region has the same attributes as the outer ones it will be merged when creating the tables with init_xlation_table(). This cannot be done as regions are added because there may be cases where adding a region makes previously mergeable regions no longer mergeable. If the attributes of an inner region are different than the outer region, new pages will be generated regardless of how "restrictive" they are. For example, RO memory is more restrictive than RW. The old implementation would give priority to RO if there is an overlap, the new one doesn't. NOTE: THIS IS THEORETICALLY A COMPATABILITY BREAK FOR PLATFORMS THAT USE THE XLAT_TABLES LIBRARY IN AN UNEXPECTED WAY. PLEASE RAISE A TF-ISSUE IF YOUR PLATFORM IS AFFECTED. Change-Id: I75fba5cf6db627c2ead70da3feb3cc648c4fe2af
2016-04-13Refactor the xlat_tables library codeSoby Mathew
The AArch32 long descriptor format and the AArch64 descriptor format correspond to each other which allows possible sharing of xlat_tables library code between AArch64 and AArch32. This patch refactors the xlat_tables library code to seperate the common functionality from architecture specific code. Prior to this patch, all of the xlat_tables library code were in `lib/aarch64/xlat_tables.c` file. The refactored code is now in `lib/xlat_tables/` directory. The AArch64 specific programming for xlat_tables is in `lib/xlat_tables/aarch64/xlat_tables.c` and the rest of the code common to AArch64 and AArch32 is in `lib/xlat_tables/xlat_tables_common.c`. Also the data types used in xlat_tables library APIs are reworked to make it compatible between AArch64 and AArch32. The `lib/aarch64/xlat_tables.c` file now includes the new xlat_tables library files to retain compatibility for existing platform ports. The macros related to xlat_tables library are also moved from `include/lib/aarch64/arch.h` to the header `include/lib/xlat_tables.h`. NOTE: THE `lib/aarch64/xlat_tables.c` FILE IS DEPRECATED AND PLATFORM PORTS ARE EXPECTED TO INCLUDE THE NEW XLAT_TABLES LIBRARY FILES IN THEIR MAKEFILES. Change-Id: I3d17217d24aaf3a05a4685d642a31d4d56255a0f