diff options
| author | Sascha Bischoff <Sascha.Bischoff@arm.com> | 2025-10-22 13:45:36 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2025-11-13 18:09:46 +0000 |
| commit | 0aab5772a53dd006c13ba629e8dc8816b7cd213d (patch) | |
| tree | bfb5f7a0b19fadae18552deb45e8bf9941fe55fa | |
| parent | b0a3f0e894f34e01f14770113f86019b1ef96040 (diff) | |
arm64/sysreg: Fix checks for incomplete sysreg definitions
The checks for incomplete sysreg definitions were checking if the
next_bit was greater than 0, which is incorrect and missed occasions
where bit 0 hasn't been defined for a sysreg. The reason is that
next_bit is -1 when all bits have been processed (LSB - 1).
Change the checks to use >= 0, instead. Also, set next_bit in Mapping
to -1 instead of 0 to match these new checks.
There are no changes to the generated sysreg definitons as part of
this change, and conveniently no definitions lack definitions for bit
0.
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rwxr-xr-x | arch/arm64/tools/gen-sysreg.awk | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/tools/gen-sysreg.awk b/arch/arm64/tools/gen-sysreg.awk index bbbb812603e8..172d04bb6cc3 100755 --- a/arch/arm64/tools/gen-sysreg.awk +++ b/arch/arm64/tools/gen-sysreg.awk @@ -133,7 +133,7 @@ $1 == "SysregFields" && block_current() == "Root" { $1 == "EndSysregFields" && block_current() == "SysregFields" { expect_fields(1) - if (next_bit > 0) + if (next_bit >= 0) fatal("Unspecified bits in " reg) define(reg "_RES0", "(" res0 ")") @@ -188,7 +188,7 @@ $1 == "Sysreg" && block_current() == "Root" { $1 == "EndSysreg" && block_current() == "Sysreg" { expect_fields(1) - if (next_bit > 0) + if (next_bit >= 0) fatal("Unspecified bits in " reg) if (res0 != null) @@ -225,7 +225,7 @@ $1 == "EndSysreg" && block_current() == "Sysreg" { print "/* For " reg " fields see " $2 " */" print "" - next_bit = 0 + next_bit = -1 res0 = null res1 = null unkn = null |