diff options
| author | Philipp Hortmann <philipp.g.hortmann@gmail.com> | 2023-03-11 22:51:49 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-03-16 09:37:01 +0100 |
| commit | 37acdfa8beaa8669b0980e8ece6045047126469a (patch) | |
| tree | 0318092cca2c461f11915559785a321dd503ac35 | |
| parent | 7358afd5bee314fc740d10c1de49a1038df478e0 (diff) | |
staging: rtl8192e: Remove unused variable rfHSSIPara1 and rfSwitchControl
Remove unused variable rfHSSIPara1 and rfSwitchControl because they are
just once set and not used. Remove unused constants as well.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Reviewed-by: Dan Carpenter <error27@gmail.com>
Link: https://lore.kernel.org/r/5f13420ce5598d447aaad0fe43b807467e0a15bb.1678569965.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8190P_def.h | 2 | ||||
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 10 | ||||
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h | 6 |
3 files changed, 0 insertions, 18 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h index 2236c1aaf335..d42eac4b6012 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h @@ -106,9 +106,7 @@ struct bb_reg_definition { u32 rfintfo; u32 rfintfe; u32 rf3wireOffset; - u32 rfHSSIPara1; u32 rfHSSIPara2; - u32 rfSwitchControl; u32 rfAGCControl1; u32 rfAGCControl2; u32 rfRxIQImbalance; diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index 87f28718e732..add3de156e09 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -368,21 +368,11 @@ static void _rtl92e_init_bb_rf_reg_def(struct net_device *dev) priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; priv->phy_reg_def[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; - priv->phy_reg_def[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; - priv->phy_reg_def[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; - priv->phy_reg_def[RF90_PATH_C].rfHSSIPara1 = rFPGA0_XC_HSSIParameter1; - priv->phy_reg_def[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; - priv->phy_reg_def[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; priv->phy_reg_def[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; priv->phy_reg_def[RF90_PATH_C].rfHSSIPara2 = rFPGA0_XC_HSSIParameter2; priv->phy_reg_def[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; - priv->phy_reg_def[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; - priv->phy_reg_def[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; - priv->phy_reg_def[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; - priv->phy_reg_def[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; - priv->phy_reg_def[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; priv->phy_reg_def[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; priv->phy_reg_def[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h index b68e84dd003f..5062be507a30 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phyreg.h @@ -48,20 +48,14 @@ #define rFPGA0_TxGainStage 0x80c #define rFPGA0_RFTiming1 0x810 #define rFPGA0_RFTiming2 0x814 -#define rFPGA0_XA_HSSIParameter1 0x820 #define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 #define rFPGA0_XB_HSSIParameter2 0x82c -#define rFPGA0_XC_HSSIParameter1 0x830 #define rFPGA0_XC_HSSIParameter2 0x834 -#define rFPGA0_XD_HSSIParameter1 0x838 #define rFPGA0_XD_HSSIParameter2 0x83c #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 #define rFPGA0_RFWakeUpParameter 0x850 #define rFPGA0_RFSleepUpParameter 0x854 -#define rFPGA0_XAB_SwitchControl 0x858 -#define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 #define rFPGA0_XB_RFInterfaceOE 0x864 #define rFPGA0_XAB_RFInterfaceSW 0x870 |