summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMarc Kleine-Budde <mkl@pengutronix.de>2025-08-06 18:24:12 +0200
committerMarc Kleine-Budde <mkl@pengutronix.de>2025-10-08 10:18:56 +0200
commit4942c42fe1849e6d68dfb5b36ccba344a9fac016 (patch)
tree83c87247a9c9ae5e816d80a8f40fa7b1b582585d
parent3d9db29b45f970d81acf61cf91a65442efbeb997 (diff)
can: m_can: m_can_chip_config(): bring up interface in correct state
In some SoCs (observed on the STM32MP15) the M_CAN IP core keeps the CAN state and CAN error counters over an internal reset cycle. An external reset is not always possible, due to the shared reset with the other CAN core. This caused the core not always be in Error Active state when bringing up the controller. Instead of always setting the CAN state to Error Active in m_can_chip_config(), fix this by reading and decoding the Protocol Status Regitser (PSR) and set the CAN state accordingly. Fixes: e0d1f4816f2a ("can: m_can: add Bosch M_CAN controller support") Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Link: https://patch.msgid.link/20250929-m_can-fix-state-handling-v4-3-682b49b49d9a@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-rw-r--r--drivers/net/can/m_can/m_can.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index ac864183a536..b6db5b57241c 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1617,7 +1617,7 @@ static int m_can_start(struct net_device *dev)
netdev_queue_set_dql_min_limit(netdev_get_tx_queue(cdev->net, 0),
cdev->tx_max_coalesced_frames);
- cdev->can.state = CAN_STATE_ERROR_ACTIVE;
+ cdev->can.state = m_can_state_get_by_psr(cdev);
m_can_enable_all_interrupts(cdev);