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| author | Florian Fainelli <f.fainelli@gmail.com> | 2017-08-17 10:00:06 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2017-08-17 10:00:06 -0700 |
| commit | 60b628ffe6a4ae4ff24441ee9e3d3130924a9727 (patch) | |
| tree | 907468cd8b9bc72f212fecc8c4bc1f49ebdd46b7 | |
| parent | ad41eacc11046fe6a199cffb6663bcd9c90df2f8 (diff) | |
| parent | f29c256853b7412961d3ee80ca525bd2530573db (diff) | |
Merge tag 'bcm2835-dt-next-2017-08-15' into devicetree/next
This pull request brings in a new SMP enable-method compat string,
which is needed to move the 32-bit SMP boot code out of the irqchip.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/cpus.txt | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/bcm2836.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/bcm2837.dtsi | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index a44253cad269..b92f12bd5244 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -200,6 +200,7 @@ described below. "arm,realview-smp" "brcm,bcm11351-cpu-method" "brcm,bcm23550" + "brcm,bcm2836-smp" "brcm,bcm-nsp-smp" "brcm,brahma-b15" "marvell,armada-375-smp" diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi index da3deeb42592..2c26d0be8b03 100644 --- a/arch/arm/boot/dts/bcm2836.dtsi +++ b/arch/arm/boot/dts/bcm2836.dtsi @@ -36,6 +36,7 @@ cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; v7_cpu0: cpu@0 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi index 2d5de6f0f78d..bc1cca5cf43c 100644 --- a/arch/arm/boot/dts/bcm2837.dtsi +++ b/arch/arm/boot/dts/bcm2837.dtsi @@ -30,6 +30,7 @@ cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit cpu0: cpu@0 { device_type = "cpu"; |