diff options
| author | Cezary Rojewski <cezary.rojewski@intel.com> | 2020-08-25 22:17:43 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-10-01 23:47:48 +0100 |
| commit | 8f2242b91501f4510f63f400cf7dae61912c6fef (patch) | |
| tree | c7f59e4cbdbd0e1faf7cb4c89549fd7a01980245 | |
| parent | 601fd3a7d849cf8a5dbd3628b3c29af9e5377961 (diff) | |
spi: pxa2xx: Add SSC2 and SSPSP2 SSP registers
Update list of SSP registers with SSC2 and SSPSP2. These registers are
utilized by LPT/WPT AudioDSP architecture.
While SSC2 shares the same offset (0x40) as SSACDD, description of this
register for SSP device present on mentioned AudioDSP is different so
define separate constant to avoid any ambiguity.
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200825201743.4926-1-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | include/linux/pxa2xx_ssp.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h index 6facf27865f9..1608c760fe91 100644 --- a/include/linux/pxa2xx_ssp.h +++ b/include/linux/pxa2xx_ssp.h @@ -186,6 +186,10 @@ #define SSIRF 0x48 /* RX FIFO trigger level */ #define SSIRF_RxThresh(x) ((x) - 1) +/* LPT/WPT SSP */ +#define SSCR2 (0x40) /* SSP Command / Status 2 */ +#define SSPSP2 (0x44) /* SSP Programmable Serial Protocol 2 */ + enum pxa_ssp_type { SSP_UNDEFINED = 0, PXA25x_SSP, /* pxa 210, 250, 255, 26x */ |