diff options
| author | Junhui Liu <junhui.liu@pigmoral.tech> | 2025-10-21 17:41:41 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2025-11-11 22:17:21 +0100 |
| commit | a1c3a7d7ee0291e6bbc89192cb942cbebadb31fe (patch) | |
| tree | 70149239653249f3316159af5c804df8cc0e96b2 | |
| parent | 579951da64253e9592d21e54b1535e0119df78ab (diff) | |
dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWI
Add SSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a
TIMER unit compliant with the ACLINT specification.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-6-5478db4f664a@pigmoral.tech
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml index c1ab865fcd64..d02c6886283a 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-sswi.yaml @@ -30,6 +30,10 @@ properties: - const: thead,c900-aclint-sswi - items: - const: mips,p8700-aclint-sswi + - items: + - enum: + - anlogic,dr1v90-aclint-sswi + - const: nuclei,ux900-aclint-sswi reg: maxItems: 1 |