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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2017-07-24 16:51:18 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2017-07-24 16:51:18 -0700 |
| commit | 53a7ff8fb785839b87f950fd85433d9c662fac89 (patch) | |
| tree | 119840a23e5226d3f258e2309b4ef1d328535dd2 /drivers/misc/cxl/fault.c | |
| parent | 4323418d62fefe48ee5019f2c744c918be06ec69 (diff) | |
| parent | 072a7852338af900c302490474939e089f4bd4c4 (diff) | |
Merge branch 'bind_unbind' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core into next
This brings in devm_device_add_group() and friends so that we can create
driver-specific device attributes as managed resources.
Diffstat (limited to 'drivers/misc/cxl/fault.c')
| -rw-r--r-- | drivers/misc/cxl/fault.c | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c index 5344448f514e..c79e39bad7a4 100644 --- a/drivers/misc/cxl/fault.c +++ b/drivers/misc/cxl/fault.c @@ -187,7 +187,7 @@ static struct mm_struct *get_mem_context(struct cxl_context *ctx) static bool cxl_is_segment_miss(struct cxl_context *ctx, u64 dsisr) { - if ((cxl_is_psl8(ctx->afu)) && (dsisr & CXL_PSL_DSISR_An_DS)) + if ((cxl_is_power8() && (dsisr & CXL_PSL_DSISR_An_DS))) return true; return false; @@ -195,16 +195,23 @@ static bool cxl_is_segment_miss(struct cxl_context *ctx, u64 dsisr) static bool cxl_is_page_fault(struct cxl_context *ctx, u64 dsisr) { - if ((cxl_is_psl8(ctx->afu)) && (dsisr & CXL_PSL_DSISR_An_DM)) - return true; + u64 crs; /* Translation Checkout Response Status */ - if ((cxl_is_psl9(ctx->afu)) && - ((dsisr & CXL_PSL9_DSISR_An_CO_MASK) & - (CXL_PSL9_DSISR_An_PF_SLR | CXL_PSL9_DSISR_An_PF_RGC | - CXL_PSL9_DSISR_An_PF_RGP | CXL_PSL9_DSISR_An_PF_HRH | - CXL_PSL9_DSISR_An_PF_STEG))) + if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_An_DM)) return true; + if (cxl_is_power9()) { + crs = (dsisr & CXL_PSL9_DSISR_An_CO_MASK); + if ((crs == CXL_PSL9_DSISR_An_PF_SLR) || + (crs == CXL_PSL9_DSISR_An_PF_RGC) || + (crs == CXL_PSL9_DSISR_An_PF_RGP) || + (crs == CXL_PSL9_DSISR_An_PF_HRH) || + (crs == CXL_PSL9_DSISR_An_PF_STEG) || + (crs == CXL_PSL9_DSISR_An_URTCH)) { + return true; + } + } + return false; } |