Merge tag 'mtd/for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "MTD core changes:
   - Fix issue where write_cached_data() fails but write() still returns
     success

   - maps: sa1100-flash: Replace zero-length array with flexible-array
     member

   - phram: Fix a double free issue in error path

   - Convert fallthrough comments into statements

   - MAINTAINERS: Add the IRC channel to the MTD related subsystems

  Raw NAND core changes:
   - Add support for manufacturer specific suspend/resume operation

   - Add support for manufacturer specific lock/unlock operation

   - Replace zero-length array with flexible-array member

   - Fix a typo ("manufecturer")

   - Ensure nand_soft_waitrdy wait period is enough

  Raw NAND controller driver changes:
   - Brcmnand:
       * Add support for flash-edu for dma transfers (+ bindings)

   - Cadence:
       * Reinit completion before executing a new command
       * Change bad block marker size
       * Fix the calculation of the avaialble OOB size
       * Get meta data size from registers

   - Qualcom:
       * Use dma_request_chan() instead dma_request_slave_channel()
       * Release resources on failure within qcom_nandc_alloc()

   - Allwinner:
       * Use dma_request_chan() instead dma_request_slave_channel()

   - Marvell:
       * Use dma_request_chan() instead dma_request_slave_channel()
       * Release DMA channel on error

   - Freescale:
       * Use dma_request_chan() instead dma_request_slave_channel()

   - Macronix:
       * Add support for Macronix NAND randomizer (+ bindings)

   - Ams-delta:
       * Rename structures and functions to gpio_nand*
       * Make the driver custom I/O ready
       * Drop useless local variable
       * Support custom driver initialisation
       * Add module device tables
       * Handle more GPIO pins as optional
       * Make read pulses optional
       * Don't hardcode read/write pulse widths
       * Push inversion handling to gpiolib
       * Enable OF partition info support
       * Drop board specific partition info
       * Use struct gpio_nand_platdata
       * Write protect device during probe

   - Ingenic:
       * Use devm_platform_ioremap_resource()
       * Add dependency on MIPS || COMPILE_TEST

   - Denali:
       * Deassert write protect pin

   - ST:
       * Use dma_request_chan() instead dma_request_slave_channel()

  Raw NAND chip driver changes:
   - Toshiba:
       * Support reading the number of bitflips for BENAND (Built-in ECC NAND)

   - Macronix:
       * Add support for deep power down mode
       * Add support for block protection

  SPI-NAND core changes:
   - Do not erase the block before writing a bad block marker

   - Explicitly use MTD_OPS_RAW to write the bad block marker to OOB

   - Stop using spinand->oobbuf for buffering bad block markers

   - Rework detect procedure for different READ_ID operation

  SPI-NAND driver changes:
   - Toshiba:
       * Support for new Kioxia Serial NAND
       * Rename function name to change suffix and prefix (8Gbit)
       * Add comment about Kioxia ID

   - Micron:
       * Add new Micron SPI NAND devices with multiple dies
       * Add M70A series Micron SPI NAND devices
       * identify SPI NAND device with Continuous Read mode
       * Add new Micron SPI NAND devices
       * Describe the SPI NAND device MT29F2G01ABAGD
       * Generalize the OOB layout structure and function names

  SPI NOR core changes:
   - Move all the manufacturer specific quirks/code out of the core, to
     make the core logic more readable and thus ease maintenance.

   - Move the SFDP logic out of the core, it provides a better
     separation between the SFDP parsing and core logic.

   - Trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
     must not be able to use structures that are meant just for the SPI
     NOR core.

   - Use the spi-mem direct mapping API to let advanced controllers
     optimize the read/write operations when they support direct
     mapping.

   - Add generic formula for the Status Register block protection
     handling. It fixes some long standing locking limitations and eases
     the addition of the 4bit block protection support.

   - Add block protection support for flashes with 4 block protection
     bits in the Status Register.

  SPI NOR controller drivers changes:
   - The mtk-quadspi driver is replaced by the new spi-mem spi-mtk-nor
     driver.

   - Merge tag 'mtk-mtd-spi-move' into spi-nor/next to avoid conflicts.

  HyperBus changes:
   - Print error msg when compatible is wrong or missing

   - Move mapping of direct access window from core to individual
     drivers"

* tag 'mtd/for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (103 commits)
  mtd: Convert fallthrough comments into statements
  mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)
  MAINTAINERS: Add the IRC channel to the MTD related subsystems
  mtd: Fix issue where write_cached_data() fails but write() still returns success
  mtd: maps: sa1100-flash: Replace zero-length array with flexible-array member
  mtd: phram: fix a double free issue in error path
  mtd: spinand: toshiba: Support for new Kioxia Serial NAND
  mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
  mtd: rawnand: macronix: Add support for deep power down mode
  mtd: rawnand: Add support for manufacturer specific suspend/resume operation
  mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
  mtd: spi-nor: Add SR 4bit block protection support
  mtd: spi-nor: Add generic formula for SR block protection handling
  mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size
  mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with flexible-array member
  mtd: spi-nor: Clear WEL bit when erase or program errors occur
  MAINTAINERS: update entry after SPI NOR controller move
  mtd: spi-nor: Trim what is exposed in spi-nor.h
  mtd: spi-nor: Drop the MFR definitions
  mtd: spi-nor: Get rid of the now empty spi_nor_ids[] table
  ...

1 files changed, 58 insertions, 13 deletions

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index f64e3b6605c6..c24e5e2ba130 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -683,7 +683,12 @@ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
 	if (ret)
 		return ret;
 
-	timeout_ms = jiffies + msecs_to_jiffies(timeout_ms);
+	/*
+	 * +1 below is necessary because if we are now in the last fraction
+	 * of jiffy and msecs_to_jiffies is 1 then we will wait only that
+	 * small jiffy fraction - possibly leading to false timeout
+	 */
+	timeout_ms = jiffies + msecs_to_jiffies(timeout_ms) + 1;
 	do {
 		ret = nand_read_data_op(chip, &status, sizeof(status), true);
 		if (ret)
@@ -4321,16 +4326,22 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
 /**
  * nand_suspend - [MTD Interface] Suspend the NAND flash
  * @mtd: MTD device structure
+ *
+ * Returns 0 for success or negative error code otherwise.
  */
 static int nand_suspend(struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
+	int ret = 0;
 
 	mutex_lock(&chip->lock);
-	chip->suspended = 1;
+	if (chip->suspend)
+		ret = chip->suspend(chip);
+	if (!ret)
+		chip->suspended = 1;
 	mutex_unlock(&chip->lock);
 
-	return 0;
+	return ret;
 }
 
 /**
@@ -4342,11 +4353,14 @@ static void nand_resume(struct mtd_info *mtd)
 	struct nand_chip *chip = mtd_to_nand(mtd);
 
 	mutex_lock(&chip->lock);
-	if (chip->suspended)
+	if (chip->suspended) {
+		if (chip->resume)
+			chip->resume(chip);
 		chip->suspended = 0;
-	else
+	} else {
 		pr_err("%s called for a chip which is not in suspended state\n",
 			__func__);
+	}
 	mutex_unlock(&chip->lock);
 }
 
@@ -4360,6 +4374,38 @@ static void nand_shutdown(struct mtd_info *mtd)
 	nand_suspend(mtd);
 }
 
+/**
+ * nand_lock - [MTD Interface] Lock the NAND flash
+ * @mtd: MTD device structure
+ * @ofs: offset byte address
+ * @len: number of bytes to lock (must be a multiple of block/page size)
+ */
+static int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+
+	if (!chip->lock_area)
+		return -ENOTSUPP;
+
+	return chip->lock_area(chip, ofs, len);
+}
+
+/**
+ * nand_unlock - [MTD Interface] Unlock the NAND flash
+ * @mtd: MTD device structure
+ * @ofs: offset byte address
+ * @len: number of bytes to unlock (must be a multiple of block/page size)
+ */
+static int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+
+	if (!chip->unlock_area)
+		return -ENOTSUPP;
+
+	return chip->unlock_area(chip, ofs, len);
+}
+
 /* Set default functions */
 static void nand_set_defaults(struct nand_chip *chip)
 {
@@ -5591,8 +5637,7 @@ static int nand_scan_tail(struct nand_chip *chip)
 		}
 		if (!ecc->read_page)
 			ecc->read_page = nand_read_page_hwecc_oob_first;
-		/* fall through */
-
+		fallthrough;
 	case NAND_ECC_HW:
 		/* Use standard hwecc read page function? */
 		if (!ecc->read_page)
@@ -5611,8 +5656,7 @@ static int nand_scan_tail(struct nand_chip *chip)
 			ecc->read_subpage = nand_read_subpage;
 		if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)
 			ecc->write_subpage = nand_write_subpage_hwecc;
-		/* fall through */
-
+		fallthrough;
 	case NAND_ECC_HW_SYNDROME:
 		if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
 		    (!ecc->read_page ||
@@ -5649,8 +5693,7 @@ static int nand_scan_tail(struct nand_chip *chip)
 			ecc->size, mtd->writesize);
 		ecc->mode = NAND_ECC_SOFT;
 		ecc->algo = NAND_ECC_HAMMING;
-		/* fall through */
-
+		fallthrough;
 	case NAND_ECC_SOFT:
 		ret = nand_set_ecc_soft_ops(chip);
 		if (ret) {
@@ -5786,8 +5829,8 @@ static int nand_scan_tail(struct nand_chip *chip)
 	mtd->_read_oob = nand_read_oob;
 	mtd->_write_oob = nand_write_oob;
 	mtd->_sync = nand_sync;
-	mtd->_lock = NULL;
-	mtd->_unlock = NULL;
+	mtd->_lock = nand_lock;
+	mtd->_unlock = nand_unlock;
 	mtd->_suspend = nand_suspend;
 	mtd->_resume = nand_resume;
 	mtd->_reboot = nand_shutdown;
@@ -5907,6 +5950,8 @@ void nand_cleanup(struct nand_chip *chip)
 	    chip->ecc.algo == NAND_ECC_BCH)
 		nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
 
+	nanddev_cleanup(&chip->base);
+
 	/* Free bad block table memory */
 	kfree(chip->bbt);
 	kfree(chip->data_buf);