diff options
| author | Faizal Rahim <faizal.abdul.rahim@linux.intel.com> | 2025-05-19 03:19:05 -0400 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2025-06-11 08:52:14 -0700 |
| commit | fe4d9e8394ff04af47cc3d040e03496d94916504 (patch) | |
| tree | 49f0f576626052786e61e86b731b77017ff254c1 /drivers/net/ethernet/intel/igc | |
| parent | 0097c4195b1d0ca57d15979626c769c74747b5a0 (diff) | |
igc: move TXDCTL and RXDCTL related macros
Move and consolidate TXDCTL and RXDCTL macros in preparation for
upcoming TXDCTL changes. This improves organization and readability.
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
Tested-by: Mor Bar-Gabay <morx.bar.gabay@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igc')
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc.h | 11 | ||||
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc_base.h | 8 |
2 files changed, 10 insertions, 9 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 859a15e4ccba..25695eada563 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -487,10 +487,19 @@ static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc) */ #define IGC_RX_PTHRESH 8 #define IGC_RX_HTHRESH 8 +#define IGC_RX_WTHRESH 4 +/* Ena specific Rx Queue */ +#define IGC_RXDCTL_QUEUE_ENABLE 0x02000000 +/* Receive Software Flush */ +#define IGC_RXDCTL_SWFLUSH 0x04000000 + #define IGC_TX_PTHRESH 8 #define IGC_TX_HTHRESH 1 -#define IGC_RX_WTHRESH 4 #define IGC_TX_WTHRESH 16 +/* Ena specific Tx Queue */ +#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 +/* Transmit Software Flush */ +#define IGC_TXDCTL_SWFLUSH 0x04000000 #define IGC_RX_DMA_ATTR \ (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) diff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethernet/intel/igc/igc_base.h index 6320eabb72fe..eaf17cd031c3 100644 --- a/drivers/net/ethernet/intel/igc/igc_base.h +++ b/drivers/net/ethernet/intel/igc/igc_base.h @@ -86,14 +86,6 @@ union igc_adv_rx_desc { } wb; /* writeback */ }; -/* Additional Transmit Descriptor Control definitions */ -#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */ -#define IGC_TXDCTL_SWFLUSH 0x04000000 /* Transmit Software Flush */ - -/* Additional Receive Descriptor Control definitions */ -#define IGC_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */ -#define IGC_RXDCTL_SWFLUSH 0x04000000 /* Receive Software Flush */ - /* SRRCTL bit definitions */ #define IGC_SRRCTL_BSIZEPKT_MASK GENMASK(6, 0) #define IGC_SRRCTL_BSIZEPKT(x) FIELD_PREP(IGC_SRRCTL_BSIZEPKT_MASK, \ |