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| author | Parth Pancholi <parth.pancholi@toradex.com> | 2025-05-13 17:21:55 +0200 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2025-06-26 13:46:52 +0530 |
| commit | abba0c4845ea110a10b4f0dec5351fef17aaa4be (patch) | |
| tree | 48b74a90b0710dbca6bfb03657c51faef982c070 /scripts/gdb/linux/xarray.py | |
| parent | 65ba2a6e77e9e5c843a591055789050e77b5c65e (diff) | |
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE1 node
The ACSPCIE1 module on TI's J784S4 SoC is capable of driving the reference
clock required by the PCIe Endpoint device. It is an alternative to on-
board and external reference clock generators.
Add the device-tree node for the same.
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Link: https://lore.kernel.org/r/20250513152155.1590689-1-parth105105@gmail.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'scripts/gdb/linux/xarray.py')
0 files changed, 0 insertions, 0 deletions