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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2025-04-07 20:16:27 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2025-04-14 11:00:19 +0200
commit74e252ac272df5a1b468ebf9fb72a25dc38b9b1b (patch)
tree918063b7208dac7333943d5b8d0b02cce51c6106 /scripts/lib/kdoc/kdoc_parser.py
parent7ed3c77a428d654c744522c98da53c8c2d77d31b (diff)
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N
Add the initial Device Tree Source Include (DTSI) file for the Renesas RZ/V2N (R9A09G056) SoC. Include support for the following components: - CPU (Cortex-A55 cores with operating points) - External clocks (audio, qextal, rtxin) - Pin controller (GPIO support) - Clock Pulse Generator (CPG) - System controller (SYS) - Serial Communication Interface (SCIF) - Secure Digital Host Interface (SDHI 0/1/2) - Generic Interrupt Controller (GIC) - ARMv8 timer Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-12-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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