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author | Ivan Vecera <ivecera@redhat.com> | 2025-07-04 20:21:51 +0200 |
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committer | Jakub Kicinski <kuba@kernel.org> | 2025-07-09 19:08:52 -0700 |
commit | 0afcee10dda16ae2c80732eecf43b586eb0750fc (patch) | |
tree | 078124cf66d95daa1c3fa7209801c40e46167df1 /scripts/lib | |
parent | f47e8f618c7d2e51b0ea5f22ad550e7f62ec45c1 (diff) |
dt-bindings: dpll: Add DPLL device and pin
Add a common DT schema for DPLL device and its associated pins.
The DPLL (device phase-locked loop) is a device used for precise clock
synchronization in networking and telecom hardware.
The device includes one or more DPLLs (channels) and one or more
physical input/output pins.
Each DPLL channel is used either to provide a pulse-per-clock signal or
to drive an Ethernet equipment clock.
The input and output pins have the following properties:
* label: specifies board label
* connection type: specifies its usage depending on wiring
* list of supported or allowed frequencies: depending on how the pin
is connected and where)
* embedded sync capability: indicates whether the pin supports this
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Link: https://patch.msgid.link/20250704182202.1641943-2-ivecera@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'scripts/lib')
0 files changed, 0 insertions, 0 deletions