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| author | Arnd Bergmann <arnd@arndb.de> | 2025-05-09 22:55:27 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-05-09 22:55:28 +0200 |
| commit | 2f57af56366a34f045467d2a5cd8c6779f0bbd9e (patch) | |
| tree | 800215cae922f0afbdafd499560c5f09272dae48 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | fecf15fab3f06083aeeb0d1a99098e2b2ea2b25d (diff) | |
| parent | d8bf82081c9e5a4f0f239cdd01296377ba490471 (diff) | |
Merge tag 'asahi-soc-dt-6.16' of https://github.com/AsahiLinux/linux into soc/dt
Apple SoC Device Tree updates for 6.16:
- A-series SoCs: CPU cache information has been added to device trees
- M-series SoCs: SPMI controller and SPMI NVMEM nodes have been added
* tag 'asahi-soc-dt-6.16' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: Add PMIC NVMEM
arm64: dts: apple: Add SPMI controller nodes
arm64: dts: apple: t8015: Add CPU caches
arm64: dts: apple: t8012: Add CPU caches
arm64: dts: apple: t8011: Add CPU caches
arm64: dts: apple: t8010: Add CPU caches
arm64: dts: apple: s8001: Add CPU caches
arm64: dts: apple: s800-0-3: Add CPU caches
arm64: dts: apple: t7001: Add CPU caches
arm64: dts: apple: t7000: Add CPU caches
arm64: dts: apple: s5l8960x: Add CPU caches
Link: https://lore.kernel.org/r/20250507160827.87725-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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