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authorVladimir Kondratiev <vladimir.kondratiev@mobileye.com>2025-01-29 11:16:37 +0200
committerThomas Gleixner <tglx@linutronix.de>2025-02-03 14:27:39 +0100
commitb93afe8a3ac53ae52296d65acfaa9c5f582a48cc (patch)
treeda2ec4cc8e247238744e9d3d6560e4fe13cb3bd6 /tools/perf/scripts/python/export-to-postgresql.py
parentc057b6e4213519e3ac167318238cd772b483f14a (diff)
irqchip/riscv-aplic: Add support for hart indexes
RISC-V APLIC specification defines "hart index" in: https://github.com/riscv/riscv-aia Within a given interrupt domain, each of the domain’s harts has a unique index number in the range 0 to 2^14 − 1 (= 16,383). The index number a domain associates with a hart may or may not have any relationship to the unique hart identifier (“hart ID”) that the RISC-V Privileged Architecture assigns to the hart. Two different interrupt domains may employ entirely different index numbers for the same set of harts. Further, this document says in "4.5 Memory-mapped control region for an interrupt domain": The array of IDC structures may include some for potential hart index numbers that are not actual hart index numbers in the domain. For example, the first IDC structure is always for hart index 0, but 0 is not necessarily a valid index number for any hart in the domain. Support arbitrary hart indices specified in an optional APLIC property "riscv,hart-indexes" which is specified as an array of u32 elements, one per interrupt target. If this property is not specified, fallback to use logical hart indices within the domain. Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/all/20250129091637.1667279-3-vladimir.kondratiev@mobileye.com
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