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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-05-19 01:22:30 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-06-04 04:44:18 +0300 |
| commit | 5f31d7e61ddf5ca8db06455b30d3b3e16d656944 (patch) | |
| tree | 051163695c0944d441d602d008a4a10092001373 /tools/perf/scripts/python | |
| parent | 6c93a21d92666b44787ee32d054d48751799aad0 (diff) | |
drm/msm/dpu: fix SSPP register definitions
Reorder SSPP register definitions to sort them in the ascending order.
Move register bitfields after the register definitions.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/537903/
Link: https://lore.kernel.org/r/20230518222238.3815293-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions