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-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml92
1 files changed, 47 insertions, 45 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
index 3c84676a167d..d63e23d9ed16 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml
@@ -51,62 +51,55 @@ properties:
#PIN CONFIGURATION NODES
patternProperties:
- '^pins':
+ '-pins$':
type: object
- description: |
- A pinctrl node should contain at least one subnodes representing the
- pinctrl groups available on the machine. Each subnode will list the
- pins it needs, and how they should be configured, with regard to muxer
- configuration, pullups, drive strength, input enable/disable and
- input schmitt.
- An example of using macro:
- pincontroller {
- /* GPIO0 set as multifunction GPIO0 */
- state_0_node_a {
- pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
- };
- /* GPIO1 set as multifunction PWM */
- state_0_node_b {
- pinmux = <PINMUX_GPIO1__FUNC_PWM_1>;
- };
- };
- $ref: "pinmux-node.yaml"
-
- properties:
- pinmux:
+ additionalProperties: false
+ patternProperties:
+ '^pins':
+ type: object
description: |
- Integer array, represents gpio pin number and mux setting.
- Supported pin number and mux varies for different SoCs, and are defined
- as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
+ A pinctrl node should contain at least one subnodes representing the
+ pinctrl groups available on the machine. Each subnode will list the
+ pins it needs, and how they should be configured, with regard to muxer
+ configuration, pullups, drive strength, input enable/disable and
+ input schmitt.
+ $ref: "pinmux-node.yaml"
- drive-strength:
- description: |
- It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See
- dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192.
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
+ properties:
+ pinmux:
+ description: |
+ Integer array, represents gpio pin number and mux setting.
+ Supported pin number and mux varies for different SoCs, and are defined
+ as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
- bias-pull-down: true
+ drive-strength:
+ description: |
+ It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See
+ dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192.
+ enum: [2, 4, 6, 8, 10, 12, 14, 16]
- bias-pull-up: true
+ bias-pull-down: true
- bias-disable: true
+ bias-pull-up: true
- output-high: true
+ bias-disable: true
- output-low: true
+ output-high: true
- input-enable: true
+ output-low: true
- input-disable: true
+ input-enable: true
- input-schmitt-enable: true
+ input-disable: true
- input-schmitt-disable: true
+ input-schmitt-enable: true
- required:
- - pinmux
+ input-schmitt-disable: true
- additionalProperties: false
+ required:
+ - pinmux
+
+ additionalProperties: false
allOf:
- $ref: "pinctrl.yaml#"
@@ -151,8 +144,17 @@ examples:
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
#interrupt-cells = <2>;
- pins {
- pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
- output-low;
+ spi1-default-pins {
+ pins-cs-mosi-clk {
+ pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
+ <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
+ <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
+ bias-disable;
+ };
+
+ pins-miso {
+ pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
+ bias-pull-down;
+ };
};
};