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2025-07-26Merge tag 'qcom-clk-for-6.17' of ↵Stephen Boyd
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom Pull Qualcomm clk driver updates from Bjorn Andersson: - Add global, display, gpu, video, camera, tcsr, and rpmh clock controller for the Qualcomm Milos SoC - Add camera, display, GPU, and video clock controllers for Qualcomm QCS615 - Add the video clock controller for Qualcomm SM6350 - Add a camera clock controller driver for Qualcomm SC8180X - Move Qualcomm PLL configuration to really probe across a variety of platforms, in order to handle the clock controllers powered by multiple power domains. - Replace round_rate() with determine_rate() across the Qualcomm clock implementations - Enable GDSC hardware control for video clock controller GDSCs in a few platforms. - Fix GE PHY reset on Qualcomm IPQ5018, broken NSS port6 frequency table on Qualcomm IPQ8074, add missing video resets on Qualcomm X1E80100 and keep the XO clock always on on Qualcomm IPQ5018. * tag 'qcom-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (65 commits) dt-bindings: clock: qcom,sm4450-dispcc: Reference qcom,gcc.yaml dt-bindings: clock: qcom,sm4450-camcc: Reference qcom,gcc.yaml dt-bindings: clock: qcom,mmcc: Reference qcom,gcc.yaml dt-bindings: clock: qcom,sm8150-camcc: Reference qcom,gcc.yaml dt-bindings: clock: qcom: Remove double colon from description clk: qcom: Add Video Clock controller (VIDEOCC) driver for Milos dt-bindings: clock: qcom: document the Milos Video Clock Controller clk: qcom: Add Graphics Clock controller (GPUCC) driver for Milos dt-bindings: clock: qcom: document the Milos GPU Clock Controller clk: qcom: Add Display Clock controller (DISPCC) driver for Milos dt-bindings: clock: qcom: document the Milos Display Clock Controller clk: qcom: Add Camera Clock controller (CAMCC) driver for Milos dt-bindings: clock: qcom: document the Milos Camera Clock Controller clk: qcom: Add Global Clock controller (GCC) driver for Milos dt-bindings: clock: qcom: document the Milos Global Clock Controller clk: qcom: common: Add support to register rcg dfs in qcom_cc_really_probe clk: qcom: gcc-x1e80100: Add missing video resets dt-bindings: clock: qcom,x1e80100-gcc: Add missing video resets clk: qcom: videocc-sm8550: Add separate frequency tables for X1E80100 clk: qcom: videocc-sm8550: Allow building without SM8550/SM8560 GCC ...
2025-07-19dt-bindings: clock: qcom,sm4450-dispcc: Reference qcom,gcc.yamlSatya Priya Kakitapalli
Reference the common qcom,gcc.yaml schema to unify the common parts of the binding. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-gcc-ref-fixes-v2-4-a2a571d2be28@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-19dt-bindings: clock: qcom,sm4450-camcc: Reference qcom,gcc.yamlSatya Priya Kakitapalli
Reference the common qcom,gcc.yaml schema to unify the common parts of the binding. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-gcc-ref-fixes-v2-3-a2a571d2be28@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-19dt-bindings: clock: qcom,mmcc: Reference qcom,gcc.yamlSatya Priya Kakitapalli
Reference the common qcom,gcc.yaml schema to unify the common parts of the binding. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-gcc-ref-fixes-v2-2-a2a571d2be28@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-19dt-bindings: clock: qcom,sm8150-camcc: Reference qcom,gcc.yamlSatya Priya Kakitapalli
Reference the common qcom,gcc.yaml schema to unify the common parts of the binding. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-gcc-ref-fixes-v2-1-a2a571d2be28@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-19dt-bindings: clock: qcom: Remove double colon from descriptionLuca Weiss
No double colon is necessary in the description. Fix it for all bindings so future bindings won't have the same copy-paste mistake. Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/lkml/20250625150458.GA1182597-robh@kernel.org/ Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-bindings-double-colon-v1-1-c04abc180fcd@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: Add Video Clock controller (VIDEOCC) driver for MilosLuca Weiss
Add support for the video clock controller found on Milos (e.g. SM7635) based devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-11-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos Video Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) Video Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-10-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: Add Graphics Clock controller (GPUCC) driver for MilosLuca Weiss
Add support for the graphics clock controller found on Milos (e.g. SM7635) based devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-9-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos GPU Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) Graphics Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-8-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: Add Display Clock controller (DISPCC) driver for MilosLuca Weiss
Add support for the display clock controller found on Milos (e.g. SM7635) based devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-7-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos Display Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) Display Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-6-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: Add Camera Clock controller (CAMCC) driver for MilosLuca Weiss
Add support for the camera clock controller found on Milos (e.g. SM7635) based devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-5-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos Camera Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) Camera Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-4-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: Add Global Clock controller (GCC) driver for MilosLuca Weiss
Add support for the global clock controller found on Milos (e.g. SM7635) based devices. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-3-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos Global Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) Global Clock Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-2-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: common: Add support to register rcg dfs in qcom_cc_really_probeLuca Weiss
Add support to register the rcg dfs in qcom_cc_really_probe(). This allows users to move the call from the probe function to static properties. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250715-sm7635-clocks-v3-1-18f9faac4984@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: gcc-x1e80100: Add missing video resetsStephan Gerhold
Add the missing video resets that are needed for the iris video codec. Copied from gcc-sm8550.c. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20250709-x1e-videocc-v2-5-ad1acf5674b4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom,x1e80100-gcc: Add missing video resetsStephan Gerhold
Add the missing video resets that are needed for the iris video codec. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20250709-x1e-videocc-v2-4-ad1acf5674b4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: videocc-sm8550: Add separate frequency tables for X1E80100Stephan Gerhold
X1E80100 videocc is identical to the one in SM8550, aside from slightly different recommended PLL frequencies. Add the separate frequency tables for that and apply them if the qcom,x1e80100-videocc compatible is used. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20250709-x1e-videocc-v2-3-ad1acf5674b4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: videocc-sm8550: Allow building without SM8550/SM8560 GCCStephan Gerhold
>From the build perspective, the videocc-sm8550 driver doesn't depend on having one of the GCC drivers enabled. It builds just fine without the GCC driver. In practice, it doesn't make much sense to have it enabled without the GCC driver, but currently this extra dependency is inconsistent with most of the other VIDEOCC entries in Kconfig. This can easily cause confusion when you see the VIDEOCC options for some of the SoCs but not for all of them. Let's just drop the depends line to allow building the videocc driver independent of the GCC selection. Compile testing with randconfig will also benefit from keeping the dependencies minimal. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20250709-x1e-videocc-v2-2-ad1acf5674b4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom,sm8450-videocc: Document X1E80100 compatibleStephan Gerhold
X1E80100 videocc is largely identical to SM8550, but needs slightly different PLL frequencies. Add a separate qcom,x1e80100-videocc compatible to the existing schema used for SM8550. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20250709-x1e-videocc-v2-1-ad1acf5674b4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: tcsrcc-sm8650: Add support for Milos SoCLuca Weiss
The Milos SoC has a very similar tcsrcc block, only TCSR_UFS_CLKREF_EN uses different regs, and both TCSR_USB2_CLKREF_EN and TCSR_USB3_CLKREF_EN are not present. Modify these resources at probe if we're probing for Milos. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250707-sm7635-clocks-misc-v2-4-b49f19055768@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: document the Milos TCSR Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) TCSR Clock Controller. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250707-sm7635-clocks-misc-v2-3-b49f19055768@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: rpmh: Add support for RPMH clocks on MilosLuca Weiss
Add support for RPMH clocks on Milos SoCs. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250707-sm7635-clocks-misc-v2-2-b49f19055768@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: qcom: Document the Milos RPMH Clock ControllerLuca Weiss
Add bindings documentation for the Milos (e.g. SM7635) RPMH Clock Controller. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250707-sm7635-clocks-misc-v2-1-b49f19055768@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: spmi-pmic-div: convert from round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250703-clk-cocci-drop-round-rate-v1-6-3a8da898367e@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: smd-rpm: convert from round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250703-clk-cocci-drop-round-rate-v1-5-3a8da898367e@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: rpmh: convert from round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250703-clk-cocci-drop-round-rate-v1-4-3a8da898367e@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: rpm: convert from round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250703-clk-cocci-drop-round-rate-v1-3-3a8da898367e@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: gcc-ipq4019: convert from round_rate() to determine_rate()Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20250703-clk-cocci-drop-round-rate-v1-2-3a8da898367e@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: videocc-qcs615: Add QCS615 video clock controller driverTaniya Das
Add support for the video clock controller for video clients to be able to request for the clocks on QCS615 platform. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-9-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: Add Qualcomm QCS615 Video clock controllerTaniya Das
Add DT bindings for the Video clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-8-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driverTaniya Das
Add support for the graphics clock controller for graphics clients to be able to request for the clocks on QCS615 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-7-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controllerTaniya Das
Add DT bindings for the Graphics clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-6-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driverTaniya Das
Add support for the display clock controller for display clients to be able to request for the clocks on QCS615 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-5-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: Add Qualcomm QCS615 Display clock controllerTaniya Das
Add DT bindings for the Display clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-4-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driverTaniya Das
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on QCS615 platform. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-3-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16dt-bindings: clock: Add Qualcomm QCS615 Camera clock controllerTaniya Das
Add DT bindings for the Camera clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-2-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLsTaniya Das
The alpha PLLs which slew to a new frequency at runtime would require the PLL to calibrate at the mid point of the VCO. Add the new PLL ops which can support the slewing of the PLL to a new frequency. Reviewed-by: Imran Shaik <quic_imrashai@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-1-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: gcc-ipq5018: fix GE PHY resetGeorge Moussalem
The MISC reset is supposed to trigger a resets across the MDC, DSP, and RX & TX clocks of the IPQ5018 internal GE PHY. So let's set the bitmask of the reset definition accordingly in the GCC as per the downstream driver. Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/00743c3e82fa87cba4460e7a2ba32f473a9ce932 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250630-ipq5018-ge-phy-v6-1-01be06378c15@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: gcc-qcm2290: Set HW_CTRL_TRIGGER for video GDSCLoic Poulain
The venus video driver will uses dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW control modes at runtime. This requires domain to have the HW_CTRL_TRIGGER flag. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250613102245.782511-1-loic.poulain@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: ipq-cmn-pll: Add IPQ5018 SoC supportGeorge Moussalem
The CMN PLL in IPQ5018 SoC supplies fixed clocks to XO, sleep, and the ethernet block. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250516-ipq5018-cmn-pll-v4-3-389a6b30e504@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16clk: qcom: ipq5018: keep XO clock always onGeorge Moussalem
The XO clock must not be disabled to avoid the kernel trying to disable the it. As such, keep the XO clock always on by flagging it as critical. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250516-ipq5018-cmn-pll-v4-1-389a6b30e504@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-16Merge branch '20250516-ipq5018-cmn-pll-v4-2-389a6b30e504@outlook.com' into ↵Bjorn Andersson
clk-for-6.17 Merge the IPQ5018 CMN PLL binding through a topic branch, to allow merging the clock defines into DeviceTree branch as well.
2025-07-16dt-bindings: clock: qcom: Add CMN PLL support for IPQ5018 SoCGeorge Moussalem
The CMN PLL block in the IPQ5018 SoC takes 96 MHZ as the reference input clock. Its output clocks are the XO (24Mhz), sleep (32Khz), and ethernet (50Mhz) clocks. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250516-ipq5018-cmn-pll-v4-2-389a6b30e504@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18clk: qcom: cmnpll: Add IPQ5424 SoC supportLuo Jie
The CMN PLL in IPQ5424 SoC supplies the fixed clock to NSS at 300 MHZ and to PPE at 375 MHZ. Other output clocks from CMN PLL on this SoC, and their rates are same as IPQ9574. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20250610-qcom_ipq5424_cmnpll-v3-2-ceada8165645@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18Merge branch '20250610-qcom_ipq5424_cmnpll-v3-1-ceada8165645@quicinc.com' ↵Bjorn Andersson
into clk-for-6.17 Merge the IPQ5424 CMN PLL binding through a topic branch, to allow the newly introduced clock constants to be made available to the DeviceTree branch as well.
2025-06-18dt-bindings: clock: qcom: Add CMN PLL support for IPQ5424 SoCLuo Jie
The CMN PLL block in the IPQ5424 SoC takes 48 MHZ as the reference input clock. The output clocks are the same as IPQ9574 SoC, except for the clock rate of output clocks to PPE and NSS. Also, add the new header file to export the CMN PLL output clock specifiers for IPQ5424 SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://lore.kernel.org/r/20250610-qcom_ipq5424_cmnpll-v3-1-ceada8165645@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10clk: qcom: camcc-sc8180x: Add SC8180X camera clock controller driverSatya Priya Kakitapalli
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SC8180X platform. Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-3-8fb1d3265f52@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-23 12:07:18 +0000