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2025-03-26arm64: dts: socfpga: agilex5: fix gpio0 addressNiravkumar L Rabara
Use the correct gpio0 address for Agilex5. Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-12-16arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake idNiravkumar L Rabara
Add gpio0 controller node and correct DMA handshake ID for SPI tx and rx channels. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-02-01arm64: dts: intel: agilex5: drop "master" I3C node name suffixKrzysztof Kozlowski
Following change in the I3C bindings, the "master" suffix in I3C controller node name is discouraged (it is "controller" now) and not accurate (if device supports also target mode). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-01-03arm64: dts: intel: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-14arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGANiravkumar L Rabara
Add the initial device tree files for Intel Agilex5 SoCFPGA platform. Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>