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Enable the PCIe controller and PHY nodes corresponding to RDP466.
The IPQ5424 RDP466 does not have a wake gpio because it does not
support low power mode. It only supports a perst gpio.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250416122538.2953658-3-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add support for wlan-2g LED on GPIO 42 and wps buttons on GPIO 19.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250120064508.2722341-1-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Enable MMC and relevant pinctrl entries.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250304113400.2806670-1-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The IPQ5424 SoC has both USB2.0 and USB3.0 controllers. The USB3.0
can connect to either of USB2.0 or USB3.0 phy and operate in the
respective mode.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241118052839.382431-7-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Enable the SPI0 node and configure the associated gpio pins.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20250103063708.3256467-3-quic_mmanikan@quicinc.com
[bjorn: Reorder nodes alphabetically]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add initial device tree support for the Qualcomm IPQ5424 SoC and
rdp466 board.
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20241028060506.246606-6-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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