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Rename the Rockchip RK3399 SoC dtsi files and, consequently, adjust their
contents and the contents of the affected board dts(i) files appropriately,
to "encapsulate" the different CPU and GPU OPPs for each of the supported
RK3399 SoC variants into the respective SoC variant dtsi files.
Moving the OPPs to the SoC variant dtsi files, instead of requiring the
board dts(i) files to include both the SoC variant dtsi file and the right
OPP variant dtsi file, reduces the possibility for mismatched inclusion and
improves the overall hierarchical representation of data.
These changes follow the approach used for the Rockchip RK3588 SoC variants,
which was introduced and described further in commit def88eb4d836 ("arm64:
dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs"). Please
see that commit for a more detailed explanation.
No functional changes are introduced, which was validated by decompiling and
comparing all affected dtb files before and after these changes. In more
detail, all decompiled dtb files remain exactly the same, except the files
list below, which results from all of them stemming from the same base board
dtsi file (rk3399-rock-pi-4.dtsi), while all of them include one of the three
different RK3399 SoC variant dtsi files by themselves:
- rk3399-rock-4se.dtb
- rk3399-rock-pi-4a.dtb
- rk3399-rock-pi-4a-plus.dtb
- rk3399-rock-pi-4b.dtb
- rk3399-rock-pi-4b-plus.dtb
- rk3399-rock-pi-4c.dtb
When compared with the decompiled original dtb files, these dtb files have
some of their blocks shuffled around a bit and some of their phandles have
different values, as a result of the changes to the order in which the
building blocks from the parent dtsi files are included into them, but they
still effectively remain the same as the originals.
The only exception to the "include only a SoC variant dtsi" is found in
rk3399-evb.dts, which includes rk3399-base.dtsi instead of rk3399.dtsi.
This is intentional, because this board dts file doesn't enable the TSADC,
so including rk3399.dtsi would enable the SoC to go into higher OPPs with
no thermal throttling in place. Let's hope that people interested in this
board will fix this in the future.
As a side note, due to the nature of introduced changes, this commit is best
viewed using the --break-rewrites option for git-log(1).
Related-to: def88eb4d836 ("arm64: dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs")
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/9417b5c5b64f9aceea64530a85a536169a3e7466.1721532747.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX
Technology Limited XT25F32) with a maximum clock frequency of 108 MHz.
Use this value for the device node's spi-max-frequency property.
This patch has been tested on ROCK Pi 4A.
Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231217113208.64056-1-stefan.nagy@ixypsilon.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The ROCK Pi 4A, ROCK Pi 4B and ROCK Pi 4C boards contain a nor-flash chip
connected to spi1. Enable spi1 and add the device node.
This patch has been tested on ROCK Pi 4A.
Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net>
Link: https://lore.kernel.org/r/20230811201118.15066-1-stefan.nagy@ixypsilon.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The ROCK 4SE uses the RK3399-T variant of the RK3399 SoC, which has some
changes to the OPP tables. Prepare for the bringup of this SoC by moving
the inclusion of existing OPP tables from the common devicetree into
each board-specific devicetree.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Link: https://lore.kernel.org/r/20230710115025.507439-2-chris.obbard@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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ROCKPi 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200807094826.12019-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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