Age | Commit message (Collapse) | Author | |
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2023-11-26 | riscv: dts: microchip: move timebase-frequency to mpfs.dtsi | Conor Dooley | |
The timebase-frequency on PolarFire SoC is not set by an oscillator on the board, but rather by an internal divider, so move the property to mpfs.dtsi. This looks to be copy-pasta from the SiFive Unleashed as the comments in both places were almost identical. In the Unleashed's case this looks to actually be valid, as the clock is provided by a crystal on the PCB. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- CC: Conor Dooley <conor.dooley@microchip.com> CC: Daire McNamara <daire.mcnamara@microchip.com> CC: Rob Herring <robh+dt@kernel.org> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: Paul Walmsley <paul.walmsley@sifive.com> CC: Palmer Dabbelt <palmer@dabbelt.com> CC: linux-riscv@lists.infradead.org CC: devicetree@vger.kernel.org | |||
2023-01-25 | riscv: dts: microchip: add the Aldec TySoM's devicetree | Conor Dooley | |
The TySOM-M-MPFS250 is a compact SoC prototyping board featuring a Microchip PolarFire SoC MPFS250T-FCG1152. Features include: - 16 Gib FPGA DDR4 - 16 Gib MSS DDR4 with ECC - eMMC - SPI flash memory - 2x Ethernet 10/100/1000 - USB 2.0 - PCIe x4 Gen2 - HDMI OUT - 2x FMC connector (HPC and LPC) Specifically flag this board as rev2, in case later boards have an FPGA design revision with more features available in the future. Link: https://www.aldec.com/en/products/emulation/tysom_boards/polarfire_microchip/tysom_m_mpfs250 [Fixed a mistake where I read 16 Gib as 16 GiB!] Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |