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path: root/arch/x86/kernel/cpu
AgeCommit message (Expand)Author
2024-02-15x86/cpu/topology: Mop up primary thread mask handlingThomas Gleixner
2024-02-15x86/cpu/topology: Use topology bitmaps for sizingThomas Gleixner
2024-02-15x86/cpu/topology: Let XEN/PV use topology from CPUID/MADTThomas Gleixner
2024-02-15x86/cpu/topology: Assign hotpluggable CPUIDs during initThomas Gleixner
2024-02-15x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplugThomas Gleixner
2024-02-15x86/topology: Add a mechanism to track topology via APIC IDsThomas Gleixner
2024-02-15x86/cpu: Detect real BSP on crash kernelsThomas Gleixner
2024-02-15x86/cpu/topology: Rework possible CPU managementThomas Gleixner
2024-02-15x86/cpu/topology: Sanitize the APIC admission logicThomas Gleixner
2024-02-15x86/cpu/topology: Use a data structure for topology infoThomas Gleixner
2024-02-15x86/cpu/topology: Simplify APIC registrationThomas Gleixner
2024-02-15x86/cpu/topology: Confine topology informationThomas Gleixner
2024-02-15x86/mpparse: Use new APIC registration functionThomas Gleixner
2024-02-15x86/cpu/topology: Provide separate APIC registration functionsThomas Gleixner
2024-02-15x86/cpu/topology: Move registration out of APIC codeThomas Gleixner
2024-02-15x86/cpu/topology: Make the APIC mismatch warnings completeThomas Gleixner
2024-02-15x86/cpu: Remove x86_coreid_bitsThomas Gleixner
2024-02-15x86/cpu: Remove topology.cThomas Gleixner
2024-02-15x86/cpu: Make topology_amd_node_id() use the actual node infoThomas Gleixner
2024-02-15x86/cpu: Use common topology code for HYGONThomas Gleixner
2024-02-15x86/cpu: Use common topology code for AMDThomas Gleixner
2024-02-15x86/cpu: Provide an AMD/HYGON specific topology parserThomas Gleixner
2024-02-15x86/cpu/amd: Provide a separate accessor for Node IDThomas Gleixner
2024-02-15x86/cpu: Use common topology code for IntelThomas Gleixner
2024-02-15x86/cpu: Provide a sane leaf 0xb/0x1f parserThomas Gleixner
2024-02-15x86/cpu: Move __max_die_per_package to common.cThomas Gleixner
2024-02-15x86/cpu: Use common topology code for Centaur and ZhaoxinThomas Gleixner
2024-02-15x86/cpu: Add legacy topology parserThomas Gleixner
2024-02-15x86/cpu: Provide cpu_init/parse_topology()Thomas Gleixner
2024-02-14Merge branch 'x86/bugs' into x86/core, to pick up pending changes before depe...Ingo Molnar
2024-02-14Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the br...Ingo Molnar
2024-02-12x86/retpoline: Ensure default return thunk isn't used at runtimeJosh Poimboeuf
2024-02-05x86/mce: Make mce_subsys constRicardo B. Marliere
2024-01-31x86/fred: Invoke FRED initialization code to enable FREDH. Peter Anvin (Intel)
2024-01-31x86/syscall: Split IDT syscall setup code into idt_syscall_init()Xin Li
2024-01-31x86/traps: Add sysvec_install() to install a system interrupt handlerXin Li
2024-01-31x86/fred: Add a machine check entry stub for FREDXin Li
2024-01-31x86/cpu: Add X86_CR4_FRED macroH. Peter Anvin (Intel)
2024-01-29x86/mtrr: Don't print errors if MtrrFixDramModEn is set when SNP enabledAshish Kalra
2024-01-29x86/sev: Add SEV-SNP host initialization supportBrijesh Singh
2024-01-29x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabledKim Phillips
2024-01-29x86/cpufeatures: Add SEV-SNP CPU featureBrijesh Singh
2024-01-25x86/cpufeatures: Add the CPU feature bit for FREDH. Peter Anvin (Intel)
2024-01-25x86/CPU/AMD: Add more models to X86_FEATURE_ZEN5Mario Limonciello
2024-01-25x86/resctrl: Remove redundant variable in mbm_config_write_domain()Babu Moger
2024-01-24x86/resctrl: Implement new mba_MBps throttling heuristicTony Luck
2024-01-23x86/resctrl: Read supported bandwidth sources from CPUIDBabu Moger
2024-01-23x86/resctrl: Remove hard-coded memory bandwidth limitBabu Moger
2024-01-23x86/CPU/AMD: Add X86_FEATURE_ZEN5Borislav Petkov (AMD)
2024-01-22x86/resctrl: Fix unused variable warning in cache_alloc_hsw_probe()Tony Luck
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