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path: root/drivers/gpu/drm/amd/include/asic_reg/vcn
AgeCommit message (Expand)Author
2025-05-13drm/amdgpu: add vcn v5_0_0 ip headersfanhuang
2025-02-19drm/amdgpu: Add JPEG4_0_3 core reset control regSathishkumar S
2025-02-12drm/amdgpu: Add VCN v4.0.3 RRMT register offsetLijo Lazar
2024-02-12drm/amdgpu: Add vcn v5_0_0 ip headers (v5)Hawking Zhang
2023-08-31drm/amdgpu: add UMSCH 4.0 register headersLang Yu
2023-08-31drm/amdgpu: add vcn 4_0_5 header filesSaleemkhan Jamadar
2023-06-09drm/amdgpu: Add vcn/jpeg ras err status registersHawking Zhang
2023-06-09drm/amdgpu: add vcn v4_0_3 ip headersHawking Zhang
2022-11-23drm/amdgpu: add register definition for VCN RAS initializationTao Zhou
2022-05-04drm/amdgpu: add vcn 4_0_0 header files v7Leo Liu
2022-03-28drm/amdgpu/vcn: Add vcn and jpeg ver 2.6 ras register definitionMohammad Zafar Ziya
2021-03-10drm/amdgpu: add vcn v2_6_0 ip headers (v3)Hawking Zhang
2020-09-17drm/amdgpu: add VCN 3.0 AV1 registersAlex Deucher
2020-06-03drm/amdgpu: add VCN3.0 register headers (v2)Leo Liu
2019-10-25drm/amdgpu: add VCN0 and VCN1 needed headersJane Jian
2019-07-18drm/amdgpu: add VCN2.5 headersLeo Liu
2019-06-20drm/amdgpu: add VCN 2.0 register headersHawking Zhang
2019-03-19drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headersTom St Denis
2018-10-12drm/amdgpu/vcn:Add new register offset/mask for VCNJames Zhu
2018-09-26drm/amdgpu:Add new register offset/mask to support VCN DPG modeJames Zhu
2018-08-27drm/amdgpu: add system interrupt mask for jrbcBoyuan Zhang
2018-08-27drm/amdgpu: add system interrupt register offset headerBoyuan Zhang
2018-06-15drm/amdgpu: add more jpeg register offset headersBoyuan Zhang
2017-12-06drm/amd/include:cleanup raven1 vcn header files.Feifei Xu
generated by cgit (git 2.34.1) at 2025-07-24 15:00:32 +0000