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path: root/drivers/gpu/drm/i915/display/intel_vdsc_regs.h
AgeCommit message (Expand)Author
2024-11-06drm/i915/vdsc: Add support for read/write PPS for 3rd DSC engineAnkit Nautiyal
2024-11-06drm/i915/vdsc: Introduce 3rd VDSC engine VDSC2Ankit Nautiyal
2024-11-06drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT VDSC engineAnkit Nautiyal
2024-10-01drm/i915: Implement hw state readout and checks for ultrajoinerStanislav Lisovskiy
2024-06-12drm/i915: Rename bigjoiner master/slave to bigjoiner primary/secondaryStanislav Lisovskiy
2024-02-08drm/i915/dsc: Fix the macro that calculates DSCC_/DSCA_ PPS reg addressManasi Navare
2023-09-11drm/i915/dsc: use REG_BIT, REG_GENMASK, and friends for PPS0 and PPS1Jani Nikula
2023-09-11drm/i915/dsc: add the PPS number to the register content macrosJani Nikula
2023-09-11drm/i915/dsc: clean up pps commentsJani Nikula
2023-09-05drm/i915/vdsc: Fill the intel_dsc_get_pps_config functionSuraj Kandpal
2023-09-05drm/i915/vdsc: Remove unused dsc registersSuraj Kandpal
2023-09-05drm/i915/vdsc: Add function to read any PPS registerSuraj Kandpal
2023-09-05drm/i915/vdsc: Refactor dsc register field macroSuraj Kandpal
2023-04-03drm/i915/dsc: Adding the new registers for DSCSuraj Kandpal
2023-03-06drm/i915/display: split out DSC and DSS registersJani Nikula
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