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path: root/drivers/net/phy/nxp-c45-tja11xx.h
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2024-10-15net: phy: c45-tja11xx: add support for outputting RMII reference clockWei Fang
For TJA11xx PHYs, they have the capability to output 50MHz reference clock on REF_CLK pin in RMII mode, which is called "revRMII" mode in the PHY data sheet. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2023-12-27net: phy: nxp-c45-tja11xx: add MACsec supportRadu Pirea (NXP OSS)
Add MACsec support. The MACsec block has four TX SCs and four RX SCs. The driver supports up to four SecY. Each SecY with one TX SC and one RX SC. The RX SCs can have two keys, key A and key B, written in hardware and enabled at the same time. The TX SCs can have two keys written in hardware, but only one can be active at a given time. On TX, the SC is selected using the MAC source address. Due of this selection mechanism, each offloaded netdev must have a unique MAC address. On RX, the SC is selected by SCI(found in SecTAG or calculated using MAC SA), or using RX SC 0 as implicit. Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>