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path: root/drivers/pinctrl/nuvoton
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2025-06-18pinctrl: nuvoton: Fix boot on ma35dx platformsMiquel Raynal
As part of a wider cleanup trying to get rid of OF specific APIs, an incorrect (and partially unrelated) cleanup was introduced. The goal was to replace a device_for_each_chil_node() loop including an additional condition inside by a macro doing both the loop and the check on a single line. The snippet: device_for_each_child_node(dev, child) if (fwnode_property_present(child, "gpio-controller")) continue; was replaced by: for_each_gpiochip_node(dev, child) which expands into: device_for_each_child_node(dev, child) for_each_if(fwnode_property_present(child, "gpio-controller")) This change is actually doing the opposite of what was initially expected, breaking the probe of this driver, breaking at the same time the whole boot of Nuvoton platforms (no more console, the kernel WARN()). Revert these two changes to roll back to the correct behavior. Fixes: 693c9ecd8326 ("pinctrl: nuvoton: Reduce use of OF-specific APIs") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/20250613181312.1269794-1-miquel.raynal@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-29Merge tag 'pinctrl-v6.15-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - None really. New drivers: - AMD ISP411 "AMD ISP" driver - Exynos 2200 and 7870 SoC subdrivers - Sophgo RISC-V SG2042 and SG2044 subdrivers - Amlogic A4 subdriver - Rockchip RK3528 subdriver - Broadcom BCM21664 subdriver - Allwinner A523/T527 subdriver - Ingenic X1600 subdriver - Microchip SAMA7D65 subdriver, essentially a re-branded Atmel AT91 PIO4 driver, but nowadays a Microschip SoC line Improvements: - Bring in the devm_kmemdup_array() helper and use it throughout, also bring in changes to other subsystems for this to establish this helper - Support EGPIO on the Qualcomm SA8775P SoC - Extend EINT support in the Mediatek driver" * tag 'pinctrl-v6.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (101 commits) pinctrl: mediatek: Add EINT support for multiple addresses pinctrl: amlogic-a4: Drop surplus semicolon pinctrl: nuvoton: Reduce use of OF-specific APIs pinctrl: nuvoton: Convert to use struct group_desc pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION() pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignment pinctrl: tegra: Fix off by one in tegra_pinctrl_get_group() pinctrl: PINCTRL_AMDISP should depend on DRM_AMD_ISP pinctrl: qcom: sa8775p: Enable egpio function dt-bindings: pinctrl: qcom: Add egpio function for sa8775p pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqs pinctrl: qcom: Clear latched interrupt status when changing IRQ type dt-bindings: pinctrl: airoha: Add missing gpio-ranges property pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all() pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe() dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl pinctrl: tegra: Set SFIO mode to Mux Register pinctrl-tegra: Restore SFSEL bit when freeing pins pinctrl: tegra: Add descriptions for SoC data fields ...
2025-03-20pinctrl: nuvoton: Reduce use of OF-specific APIsAndy Shevchenko
Some drivers are using device property APIs along with OF-specific ones. At the same time few of the latter can be converted to device property calls. Reduce use of OF-specific APIs in order to bring a bit more consistency into the drivers. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Convert to use struct group_descAndy Shevchenko
The pin control core header provides struct group_desc. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION()Andy Shevchenko
Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()Andy Shevchenko
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-20pinctrl: npcm8xx: Fix incorrect struct npcm8xx_pincfg assignmentAndy Shevchenko
Sparse is not happy about implementation of the NPCM8XX_PINCFG() pinctrl-npcm8xx.c:1314:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1315:9: warning: obsolete array initializer, use C99 syntax ... pinctrl-npcm8xx.c:1412:9: warning: obsolete array initializer, use C99 syntax pinctrl-npcm8xx.c:1413:9: warning: too many warnings which uses index-based assignment in a wrong way, i.e. it missed the equal sign and hence the index is simply ignored, while the entries are indexed naturally. This is not a problem as the pin numbering repeats the natural order, but it might be in case of shuffling the entries. Fix this by adding missed equal sign and reformat a bit for better readability. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250318105932.2090926-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-28pinctrl: wpcm450: Switch to use for_each_gpiochip_node() helperAndy Shevchenko
Switch the code to use for_each_gpiochip_node() helper. While at it, correct header inclusion as device property APIs are provided in property.h. Reviewed-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/20250220155036.2734838-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-25pinctrl: nuvoton: npcm8xx: Add NULL check in npcm8xx_gpio_fwCharles Han
devm_kasprintf() calls can return null pointers on failure. But the return values were not checked in npcm8xx_gpio_fw(). Add NULL check in npcm8xx_gpio_fw(), to handle kernel NULL pointer dereference error. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Charles Han <hanchunchao@inspur.com> Link: https://lore.kernel.org/20250212100532.4317-1-hanchunchao@inspur.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-02-17pinctrl: nuvoton: npcm8xx: Fix error handling in npcm8xx_gpio_fw()Yue Haibing
fwnode_irq_get() was changed to not return 0, fix this by checking for negative error, also update the error log. Fixes: acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver") Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/20250118031334.243324-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-11pinctrl: nuvoton: fix a double free in ma35_pinctrl_dt_node_to_map_func()Harshit Mogalapalli
'new_map' is allocated using devm_* which takes care of freeing the allocated data on device removal, call to .dt_free_map = pinconf_generic_dt_free_map double frees the map as pinconf_generic_dt_free_map() calls pinctrl_utils_free_map(). Fix this by using kcalloc() instead of auto-managed devm_kcalloc(). Cc: stable@vger.kernel.org Fixes: f805e356313b ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver") Reported-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Link: https://lore.kernel.org/20241010205237.1245318-1-harshit.m.mogalapalli@oracle.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: modify pins flagsTomer Maimon
Modify the following pins flags on the Nuvoton NPCM8XX BMC: - Add pins 110-113, 187, 191, 192, 194-199, 202 SLEW flag - Add pins 229 and 230 GPO flag. - Remove pin 233 SLEWLPC flag. - Remove pin 251 SLEW flag. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-8-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configurationTomer Maimon
Modify clkrun and serirq pin configuration on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-7-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins groupTomer Maimon
Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36Tomer Maimon
This patch adds support for GPIO pins GPI35 and GPI36 on the Nuvoton NPCM8xx BMC SoC. The pins are configured for only for input. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-5-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: clear polarity before set both edgeTomer Maimon
Clear polarity before setting both edges to ensure that the polarity is in the same state before configuring events for both edges Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-4-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-05pinctrl: nuvoton: npcm8xx: remove non-existent pins, groups, functionsTomer Maimon
Remove non-existent smb4den abd lpcclk pins, groups and functions on the Nuvoton NPCM8XX BMC SoC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/20240716194008.3502068-3-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: nuvoton: ma35d1: Fix an IS_ERR() vs NULL checkDan Carpenter
The fwnode_iomap() function doesn't return error pointers, it returns NULL. It's the same as of_iomap() in that way. Update the check accordingly. Fixes: ecc5bf868673 ("pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/840152f9-d3bb-410e-8164-4c5043e1983e@moroto.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driverJacky Huang
Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and add support for ma35d1 pinctrl. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Link: https://lore.kernel.org/r/20240521012447.42211-4-ychuang570808@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-02-07pinctrl: nuvoton: Constify wpcm450_groupsAndy Shevchenko
There is no modifications are assumed for wpcm450_groups. Constify it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211154239.4190429-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()Andy Shevchenko
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: npcm7xx: prevent glitch when setting the GPIO to output highTomer Maimon
Enable GPIO output after setting the output value to prevent a glitch when pinctrl driver sets gpio pin to output high and the pin is in the default state (high->low->high). Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://lore.kernel.org/r/20231115211209.1683449-1-william@wkennington.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm8xx: drop wrappers around pinctrl_gpio_request/free()Bartosz Golaszewski
pinctrl_gpio_*() helpers now have signatures corresponding with those of the GPIOLIB callbacks. We can drop the wrappers. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm7xx: drop wrappers around pinctrl_gpio_request/free()Bartosz Golaszewski
pinctrl_gpio_*() helpers now have signatures corresponding with those of the GPIOLIB callbacks. We can drop the wrappers. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_direction_output_new()Bartosz Golaszewski
Now that pinctrl_gpio_direction_output() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_direction_input_new()Bartosz Golaszewski
Now that pinctrl_gpio_direction_input() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_free_new()Bartosz Golaszewski
Now that pinctrl_gpio_free()() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04treewide: rename pinctrl_gpio_request_new()Bartosz Golaszewski
Now that pinctrl_gpio_request() is no longer used, let's drop the '_new' suffix from its improved variant. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm8xx: use new pinctrl GPIO helpersBartosz Golaszewski
Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-04pinctrl: nuvoton: npcm7xx: use new pinctrl GPIO helpersBartosz Golaszewski
Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-03Merge tag 'pinctrl-v6.7-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No pin control core changes this time. New drivers: - Realtek RTD family pin control driver and RTD1619B, RTD1319D and RTD1315E subdrivers - Nuvoton NPCM8xx combined pin control and GPIO driver - Amlogic T7 pin control driver - Renesas RZ/G3S pin control driver Improvements: - A number of additional UART groups added to the Mediatek MT7981 driver - MPM pin maps added for Qualcomm MSM8996, SM6115, SM6125 and SDM660 - Extra GPIO banks for the Sunxi H616 - MLSP I2C6 function support in Qualcomm MSM8226 - Some __counted_by() annotations for dynamic arrays - Ongoing work to make remove() return void - LSBC groups and functions in the Renesas R8A7778" * tag 'pinctrl-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits) pinctrl: Use device_get_match_data() dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent dt-bindings: pinctrl: nuvoton,npcm845: Add missing additionalProperties on gpio child nodes dt-bindings: pinctrl: brcm: Ensure all child node properties are documented pinctrl: renesas: rzn1: Convert to platform remove callback returning void pinctrl: renesas: rzg2l: Add RZ/G3S support dt-bindings: pinctrl: renesas: Document RZ/G3S SoC pinctrl: renesas: rzg2l: Add support for different DS values on different groups pinctrl: renesas: rzg2l: Move DS and OI to SoC-specific configuration pinctrl: renesas: rzg2l: Adapt function number for RZ/G3S pinctrl: renesas: rzg2l: Adapt for different SD/PWPR register offsets pinctrl: renesas: rzg2l: Index all registers based on port offset pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() pinctrl: renesas: r8a7778: Add LBSC pins, groups, and functions pinctrl: intel: fetch community only when we need it pinctrl: cherryview: reduce scope of PIN_CONFIG_BIAS_HIGH_IMPEDANCE case pinctrl: cherryview: Convert to platform remove callback returning void pinctrl: sprd-sc9860: Convert to platform remove callback returning void pinctrl: qcom/msm: Convert to platform remove callback returning void pinctrl: qcom/lpi: Convert to platform remove callback returning void ...
2023-09-13pinctrl: nuvoton: Fix up Kconfig depsLinus Walleij
We have build errors due to missing dependency on OF. Add the dependency and do it the same way for all three Nuvotons while we are at it. Reported-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230913-novoton-kconfig-v1-1-1c2dff14c0d2@linaro.org
2023-09-12pinctrl: nuvoton: wpcm450: fix out of bounds writeMikhail Kobuk
Write into 'pctrl->gpio_bank' happens before the check for GPIO index validity, so out of bounds write may happen. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Mikhail Kobuk <m.kobuk@ispras.ru> Reviewed-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20230825101532.6624-1-m.kobuk@ispras.ru Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driverTomer Maimon
Add pinctrl and GPIO controller driver support to Arbel BMC NPCM8XX SoC. Arbel BMC NPCM8XX pinctrl driver based on Poleg NPCM7XX, except the pin mux mapping difference the NPCM8XX GPIO supports adjust debounce period time. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Link: https://lore.kernel.org/r/20230828140849.21724-3-tmaimon77@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-11pinctrl: nuvoton: Use pinconf_generic_dt_node_to_map_all()Geert Uytterhoeven
Use the pinconf_generic_dt_node_to_map_all() helper instead of open-coding the same operation, to avoid having to provide custom pinctrl_ops.dt_node_to_map() callbacks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/81e9ab48f78d63153b23a163b3349b3059d2b7fc.1692871558.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-09pinctrl: npcm7xx: Add missing check for ioremapJiasheng Jiang
Add check for ioremap() and return the error if it fails in order to guarantee the success of ioremap(). Fixes: 3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver") Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230607095829.1345-1-jiasheng@iscas.ac.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02Merge tag 'pinctrl-v6.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Mostly drivers! Nothing special: some new Qualcomm chips as usual, and the new NXP S32 and nVidia BlueField-3. Core changes: - Make a lot of pin controllers with GPIO and irqchips immutable, i.e. not living structs, but const structs. This is driving a changed initiated by the irqchip maintainers. New drivers: - New driver for the NXP S32 SoC pin controller - As part of a thorough cleanup and restructuring of the Ralink/Mediatek drivers, the Ralink MIPS pin control drivers were folded into the Mediatek directory and the family is renamed "mtmips". The Ralink chips live on as Mediatek MIPS family where new variants can be added. As part of this work also the device tree bindings were reworked. - New subdriver for the Qualcomm SM7150 SoC. - New subdriver for the Qualcomm IPQ9574 SoC. - New driver for the nVidia BlueField-3 SoC. - Support for the Qualcomm PMM8654AU mixed signal circuit GPIO. - Support for the Qualcomm PMI632 mixed signal circuit GPIO. Improvements: - Add some missing pins and generic cleanups on the Renesas r8a779g0 and r8a779g0 pin controllers. Generic Renesas extension for power source selection on several SoCs. - Misc cleanups for the Atmel AT91 and AT91-PIO4 pin controllers - Make the GPIO mode work on the Qualcomm SM8550-lpass-lpi driver. - Several device tree binding cleanups as the binding YAML syntax is solidifying" * tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits) pinctrl-bcm2835.c: fix race condition when setting gpio dir dt-bindings: pinctrl: qcom,sm8150: Drop duplicate function value "atest_usb2" dt-bindings: pinctrl: qcom: Add few missing functions pinctrl: qcom: spmi-gpio: Add PMI632 support dt-bindings: pinctrl: qcom,pmic-gpio: add PMI632 pinctrl: wpcm450: select MFD_SYSCON pinctrl: qcom ssbi-gpio: Convert to immutable irq_chip pinctrl: qcom ssbi-mpp: Convert to immutable irq_chip pinctrl: qcom spmi-mpp: Convert to immutable irq_chip pinctrl: plgpio: Convert to immutable irq_chip pinctrl: pistachio: Convert to immutable irq_chip pinctrl: pic32: Convert to immutable irq_chip pinctrl: sx150x: Convert to immutable irq_chip pinctrl: stmfx: Convert to immutable irq_chip pinctrl: st: Convert to immutable irq_chip pinctrl: mcp23s08: Convert to immutable irq_chip pinctrl: equilibrium: Convert to immutable irq_chip pinctrl: npcm7xx: Convert to immutable irq_chip pinctrl: armada-37xx: Convert to immutable irq_chip pinctrl: nsp: Convert to immutable irq_chip ...
2023-04-21pinctrl: wpcm450: select MFD_SYSCONJonathan Neuschäfer
The pinctrl-wpcm450 driver relies on MFD_SYSCON functionality in order to find some of its MMIO registers. Select MFD_SYSCON from PINCTRL_WPCM450 to ensure that it's enabled. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20230412185049.3782842-1-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-04-14pinctrl: npcm7xx: Convert to immutable irq_chipLinus Walleij
Convert the driver to immutable irq-chip with a bit of intuition. I refactored the way the state container was accessed in the irq_chip callbacks to all look the same and switch to use irqd_to_hwirq() while we are at it. Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-4-503788a7f6e6@linaro.org
2023-04-13pinctrl: nuvoton: npcm7xx: remove MODULE_LICENSE in non-modulesNick Alcock
Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock <nick.alcock@oracle.com> Suggested-by: Luis Chamberlain <mcgrof@kernel.org> Cc: Luis Chamberlain <mcgrof@kernel.org> Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com> Cc: Avi Fishman <avifishman70@gmail.com> Cc: Tomer Maimon <tmaimon77@gmail.com> Cc: Tali Perry <tali.perry1@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: openbmc@lists.ozlabs.org Cc: linux-gpio@vger.kernel.org Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2022-11-10pinctrl: nuvoton: wpcm450: Fix handling of inverted MFSEL bitsJonathan Neuschäfer
SCS3SEL and KBCCSEL use inverted logic: Whereas in other fields 0 selects the GPIO function and 1 selects the special function, in these two fields, 0 selects the special function and 1 selects the GPIO function. Adjust the code to handle this quirk. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221105185911.1547847-3-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-10pinctrl: nuvoton: wpcm450: Refactor MFSEL setting codeJonathan Neuschäfer
In preparation for the next patch, which makes the logic around setting/resetting bits in MFSEL a little more complicated, move that code to a new function Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221105185911.1547847-2-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-09pinctrl: nuvoton: wpcm450: Convert irqchip to IRQCHIP_IMMUTABLEJonathan Neuschäfer
Commit 6c846d026d490 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning for irqchips that are not marked with IRQCHIP_IMMUTABLE. Convert the pinctrl-wpcm450 driver to an immutable irqchip. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221031222833.201322-1-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-24pinctrl: npcm7xx: Add missing header(s)Andy Shevchenko
Do not imply that some of the generic headers may be always included. Instead, include explicitly what we are direct user of. While at it, sort headers alphabetically. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-10-04pinctrl: wpcm450: Correct the fwnode_irq_get() return value checkAndy Shevchenko
fwnode_irq_get() can return zero to indicate IRQ mapping errors. Handle this case by skipping the interrupt resource. Fixes: a1d1e0e3d80a ("pinctrl: nuvoton: Add driver for WPCM450") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20220927175509.15695-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-26pinctrl: nuvoton: Use 'unsigned int' instead of just 'unsigned'.Jilin Yuan
'unsigned int' should be clearer than 'unsigned'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Link: https://lore.kernel.org/r/20220825124134.30242-1-yuanjilin@cdjrlc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-28Merge tag 'pinctrl-v5.19-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Pretty big this time. Mostly due to (nice) Renesas refactorings. Core changes: - New helpers from Andy such as for_each_gpiochip_node() affecting both GPIO and pin control, improving a bunch of drivers in the process. - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started to apply fixups on top. New drivers: - New driver for Marvell MVEBU 98DX2530. - New driver for Mediatek MT8195. - Support Qualcomm PMX65 and PM6125. - New driver for Qualcomm SC7280 LPASS pin control. - New driver for Rockchip RK3588. - New driver for NXP Freescale i.MXRT1170. - New driver for Mediatek MT6795 Helio X10. Improvements: - Several Aspeed G6 cleanups and non-critical fixes. - Thorought refactoring of some of the ever improving Renesas drivers. - Clean up Mediatek MT8192 bindings a bit. - PWM output and clock monitoring in the Ocelot LAN966x driver. - Thorough refactoring and cleanup of the Ralink drivers such as RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper sub-drivers" * tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits) pinctrl: apple: Use a raw spinlock for the regmap pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs pinctrl: intel: Fix kernel doc format, i.e. add return sections dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent' pinctrl: starfive: Make the irqchip immutable pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10 dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings pinctrl: freescale: Add i.MXRT1170 pinctrl driver support dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation dt-bindings: pinctrl: rockchip: increase max amount of device functions dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges' dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable' dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU pinctrl: qcom: spmi-gpio: Add pm6125 compatible dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl pinctrl: intel: make irq_chip immutable pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask() ...
2022-05-04pinctrl: nuvoton: Fix irq_of_parse_and_map() return valueKrzysztof Kozlowski
The irq_of_parse_and_map() returns 0 on failure, not a negative ERRNO. Fixes: 3b588e43ee5c ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220423094142.33013-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-02Merge tag 'intel-gpio-v5.19-1' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next intel-gpio for v5.19-1 * Introduce helpers to iterate over GPIO chip nodes and covert some drivers gpiolib: - Introduce a helper to get first GPIO controller node - Introduce gpiochip_node_count() helper - Introduce for_each_gpiochip_node() loop helper pinctrl: - meson: Replace custom code by gpiochip_node_count() call - meson: Enable COMPILE_TEST - meson: Rename REG_* to MESON_REG_* - armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register() - armada-37xx: Switch to use fwnode instead of of_node - samsung: Switch to use for_each_gpiochip_node() helper - samsung: Drop redundant node parameter in samsung_banks_of_node_get() - npcm7xx: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Replace custom code by gpiochip_node_count() call - stm32: Switch to use for_each_gpiochip_node() helper - stm32: Replace custom code by gpiochip_node_count() call
2022-04-25gpio: use raw spinlock for gpio chip shadowed dataSchspa Shi
In case of PREEMPT_RT, there is a raw_spinlock -> spinlock dependency as the lockdep report shows. __irq_set_handler irq_get_desc_buslock __irq_get_desc_lock raw_spin_lock_irqsave(&desc->lock, *flags); // raw spinlock get here __irq_do_set_handler mask_ack_irq dwapb_irq_ack spin_lock_irqsave(&gc->bgpio_lock, flags); // sleep able spinlock irq_put_desc_busunlock Replace with a raw lock to avoid BUGs. This lock is only used to access registers, and It's safe to replace with the raw lock without bad influence. [ 15.090359][ T1] ============================= [ 15.090365][ T1] [ BUG: Invalid wait context ] [ 15.090373][ T1] 5.10.59-rt52-00983-g186a6841c682-dirty #3 Not tainted [ 15.090386][ T1] ----------------------------- [ 15.090392][ T1] swapper/0/1 is trying to lock: [ 15.090402][ T1] 70ff00018507c188 (&gc->bgpio_lock){....}-{3:3}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090470][ T1] other info that might help us debug this: [ 15.090477][ T1] context-{5:5} [ 15.090485][ T1] 3 locks held by swapper/0/1: [ 15.090497][ T1] #0: c2ff0001816de1a0 (&dev->mutex){....}-{4:4}, at: __device_driver_lock+0x98/0x104 [ 15.090553][ T1] #1: ffff90001485b4b8 (irq_domain_mutex){+.+.}-{4:4}, at: irq_domain_associate+0xbc/0x6d4 [ 15.090606][ T1] #2: 4bff000185d7a8e0 (lock_class){....}-{2:2}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090654][ T1] stack backtrace: [ 15.090661][ T1] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.10.59-rt52-00983-g186a6841c682-dirty #3 [ 15.090682][ T1] Hardware name: Horizon Robotics Journey 5 DVB (DT) [ 15.090692][ T1] Call trace: ...... [ 15.090811][ T1] _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090828][ T1] dwapb_irq_ack+0xb4/0x300 [ 15.090846][ T1] __irq_do_set_handler+0x494/0xb2c [ 15.090864][ T1] __irq_set_handler+0x74/0x114 [ 15.090881][ T1] irq_set_chip_and_handler_name+0x44/0x58 [ 15.090900][ T1] gpiochip_irq_map+0x210/0x644 Signed-off-by: Schspa Shi <schspa@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Doug Berger <opendmb@gmail.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
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