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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/sophgo,sg2044-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Sophgo SG2044 Clock Controller
maintainers:
- Inochi Amaoto <inochiama@gmail.com>
description: |
The Sophgo SG2044 clock controller requires an external oscillator
as input clock.
All available clocks are defined as preprocessor macros in
include/dt-bindings/clock/sophgo,sg2044-clk.h
properties:
compatible:
const: sophgo,sg2044-clk
reg:
maxItems: 1
clocks:
items:
- description: fpll0
- description: fpll1
- description: fpll2
- description: dpll0
- description: dpll1
- description: dpll2
- description: dpll3
- description: dpll4
- description: dpll5
- description: dpll6
- description: dpll7
- description: mpll0
- description: mpll1
- description: mpll2
- description: mpll3
- description: mpll4
- description: mpll5
clock-names:
items:
- const: fpll0
- const: fpll1
- const: fpll2
- const: dpll0
- const: dpll1
- const: dpll2
- const: dpll3
- const: dpll4
- const: dpll5
- const: dpll6
- const: dpll7
- const: mpll0
- const: mpll1
- const: mpll2
- const: mpll3
- const: mpll4
- const: mpll5
'#clock-cells':
const: 1
required:
- compatible
- reg
- clocks
- '#clock-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/sophgo,sg2044-pll.h>
clock-controller@50002000 {
compatible = "sophgo,sg2044-clk";
reg = <0x50002000 0x1000>;
#clock-cells = <1>;
clocks = <&syscon CLK_FPLL0>, <&syscon CLK_FPLL1>,
<&syscon CLK_FPLL2>, <&syscon CLK_DPLL0>,
<&syscon CLK_DPLL1>, <&syscon CLK_DPLL2>,
<&syscon CLK_DPLL3>, <&syscon CLK_DPLL4>,
<&syscon CLK_DPLL5>, <&syscon CLK_DPLL6>,
<&syscon CLK_DPLL7>, <&syscon CLK_MPLL0>,
<&syscon CLK_MPLL1>, <&syscon CLK_MPLL2>,
<&syscon CLK_MPLL3>, <&syscon CLK_MPLL4>,
<&syscon CLK_MPLL5>;
clock-names = "fpll0", "fpll1", "fpll2", "dpll0",
"dpll1", "dpll2", "dpll3", "dpll4",
"dpll5", "dpll6", "dpll7", "mpll0",
"mpll1", "mpll2", "mpll3", "mpll4",
"mpll5";
};
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