arch/arm64/boot/dts/renesas/r8a779f0-spider-ethernet.dtsi


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// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the Spider Ethernet sub-board
 *
 * Copyright (C) 2021 Renesas Electronics Corp.
 */

/ {
	aliases {
		ethernet0 = &rswitch_port0;
		ethernet1 = &rswitch_port1;
		ethernet2 = &rswitch_port2;
	};
};

&eth_serdes {
	status = "okay";
};

&i2c4 {
	eeprom@52 {
		compatible = "rohm,br24g01", "atmel,24c01";
		label = "ethernet-sub-board";
		reg = <0x52>;
		pagesize = <8>;
	};
};

&pfc {
	tsn0_pins: tsn0 {
		groups = "tsn0_mdio_b", "tsn0_link_b";
		function = "tsn0";
		power-source = <1800>;
	};

	tsn1_pins: tsn1 {
		groups = "tsn1_mdio_b", "tsn1_link_b";
		function = "tsn1";
		power-source = <1800>;
	};

	tsn2_pins: tsn2 {
		groups = "tsn2_mdio_b", "tsn2_link_b";
		function = "tsn2";
		power-source = <1800>;
	};
};

&rswitch {
	pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>, <&tsn2_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&rswitch_port0 {
	reg = <0>;
	phy-handle = <&u101>;
	phy-mode = "sgmii";
	phys = <&eth_serdes 0>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		u101: ethernet-phy@1 {
			reg = <1>;
			compatible = "ethernet-phy-ieee802.3-c45";
			interrupts-extended = <&gpio3 10 IRQ_TYPE_LEVEL_LOW>;
		};
	};
};

&rswitch_port1 {
	reg = <1>;
	phy-handle = <&u201>;
	phy-mode = "sgmii";
	phys = <&eth_serdes 1>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		u201: ethernet-phy@2 {
			reg = <2>;
			compatible = "ethernet-phy-ieee802.3-c45";
			interrupts-extended = <&gpio3 11 IRQ_TYPE_LEVEL_LOW>;
		};
	};
};

&rswitch_port2 {
	reg = <2>;
	phy-handle = <&u301>;
	phy-mode = "sgmii";
	phys = <&eth_serdes 2>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		u301: ethernet-phy@3 {
			reg = <3>;
			compatible = "ethernet-phy-ieee802.3-c45";
			interrupts-extended = <&gpio3 9 IRQ_TYPE_LEVEL_LOW>;
		};
	};
};