diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-09-29 10:40:15 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-10-30 08:53:25 +0800 |
| commit | 061883e690ebf6fc5a17fdf55249a3b8d5c111fe (patch) | |
| tree | 6ab978ea37d894e0b502cd5edd52efd9c3d7a87d | |
| parent | 0656e37a8fa87fca12ef255de018a9d80ba23eb8 (diff) | |
arm64: dts: imx8mp: adjust GIC CPU mask to match number of CPUs
i.MX 8M Plus has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 6038f66aefc1..c69c206068a4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -202,10 +202,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <8000000>; arm,no-tick-in-suspend; }; |