diff options
| author | Sean Anderson <sean.anderson@linux.dev> | 2024-09-27 16:13:13 -0400 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-10-09 13:52:54 +0200 |
| commit | 07aca8190a4ff9370823f577b66f23b8f2de4442 (patch) | |
| tree | 8af007b53664820e86447a1e967f73fe7529fd9a | |
| parent | b583f90f8c13669631a297d823ea9771afa9bd16 (diff) | |
arm64: dts: renesas: beacon: Add SD/OE pin properties
Add SD/OE pin properties to the devicetree so that Linux can configure
the pin without relying on the OTP. This matches the register
configuration reported by Adam [1] as well as his analysis of the
schematic.
[1] https://lore.kernel.org/linux-arm-kernel/CAHCN7x+tcvih1-kmUs8tVLCAk0Gnj11t0yEZLPWk3UBNyad7Jg@mail.gmail.com/
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240927201313.624762-4-sean.anderson@linux.dev
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 9436b249ebdd..5887b31852f9 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -364,6 +364,8 @@ #clock-cells = <1>; clocks = <&x304_clk>; clock-names = "xin"; + idt,shutdown = <0>; + idt,output-enable-active = <0>; assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>, <&versaclock6_bb 3>, <&versaclock6_bb 4>; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index 68b04e56ae56..06ad9db420d6 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -166,6 +166,8 @@ #clock-cells = <1>; clocks = <&x304_clk>; clock-names = "xin"; + idt,shutdown = <0>; + idt,output-enable-active = <0>; /* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */ assigned-clocks = <&versaclock5 1>, <&versaclock5 2>, |